linux-kernel - [PATCH 1/3] dt-bindings: clock: gcc-msm8998: Add Q6 and LPASS clocks definitions

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Message-Id: <20240814-lpass-v1-1-a5bb8f9dfa8b@freebox.fr>
Date: Wed, 14 Aug 2024 18:20:22 +0200
From: Marc Gonzalez <mgonzalez@...ebox.fr>
To: Bjorn Andersson <andersson@...nel.org>, 
 Konrad Dybcio <konradybcio@...nel.org>, 
 Michael Turquette <mturquette@...libre.com>, 
 Stephen Boyd <sboyd@...nel.org>, Rob Herring <robh@...nel.org>, 
 Krzysztof Kozlowski <krzk+dt@...nel.org>, 
 Conor Dooley <conor+dt@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org, 
 devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, 
 Arnaud Vrac <avrac@...ebox.fr>, Pierre-Hugues Husson <phhusson@...ebox.fr>, 
 Marijn Suijten <marijn.suijten@...ainline.org>, 
 AngeloGioacchino Del Regno <angelogioacchino.delregno@...ainline.org>, 
 Marc Gonzalez <mgonzalez@...ebox.fr>
Subject: [PATCH 1/3] dt-bindings: clock: gcc-msm8998: Add Q6 and LPASS
 clocks definitions

From: AngeloGioacchino Del Regno <angelogioacchino.delregno@...ainline.org>

Add definitions for the Q6 BIMC, LPASS core and adsp smmu clocks,
required to enable audio functionality on MSM8998.

Add the GDSC definitions for the LPASS_ADSP_GDSC and LPASS_CORE_GDSC
as a final step to enable the required clock tree for the lpass iommu
and for the audio dsp itself.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...ainline.org>
Signed-off-by: Marc Gonzalez <mgonzalez@...ebox.fr>
---
 include/dt-bindings/clock/qcom,gcc-msm8998.h | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/include/dt-bindings/clock/qcom,gcc-msm8998.h b/include/dt-bindings/clock/qcom,gcc-msm8998.h
index b5456a64d4213..5b0dde0809007 100644
--- a/include/dt-bindings/clock/qcom,gcc-msm8998.h
+++ b/include/dt-bindings/clock/qcom,gcc-msm8998.h
@@ -193,10 +193,15 @@
 #define GCC_MMSS_GPLL0_DIV_CLK					184
 #define GCC_GPU_GPLL0_DIV_CLK					185
 #define GCC_GPU_GPLL0_CLK					186
+#define HLOS1_VOTE_LPASS_CORE_SMMU_CLK				187
+#define HLOS1_VOTE_LPASS_ADSP_SMMU_CLK				188
+#define GCC_MSS_Q6_BIMC_AXI_CLK					189
 
 #define PCIE_0_GDSC						0
 #define UFS_GDSC						1
 #define USB_30_GDSC						2
+#define LPASS_ADSP_GDSC						3
+#define LPASS_CORE_GDSC						4
 
 #define GCC_BLSP1_QUP1_BCR					0
 #define GCC_BLSP1_QUP2_BCR					1

-- 
2.34.1