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Message-ID: <20240814162726.5efe1a6e.alex.williamson@redhat.com>
Date: Wed, 14 Aug 2024 16:27:26 -0600
From: Alex Williamson <alex.williamson@...hat.com>
To: Lu Baolu <baolu.lu@...ux.intel.com>
Cc: Joerg Roedel <joro@...tes.org>, Will Deacon <will@...nel.org>, Jacob Pan
<jacob.jun.pan@...ux.intel.com>, iommu@...ts.linux.dev,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 6/7] iommu/vt-d: Add helper to flush caches for context
change
Hi Baolu,
This appears to be non-functional and breaks device assignment...
On Tue, 2 Jul 2024 21:08:38 +0800
Lu Baolu <baolu.lu@...ux.intel.com> wrote:
> diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
> index 1f0d6892a0b6..e84b0fdca107 100644
> --- a/drivers/iommu/intel/iommu.c
> +++ b/drivers/iommu/intel/iommu.c
...
> @@ -1959,7 +1944,6 @@ static void domain_context_clear_one(struct device_domain_info *info, u8 bus, u8
> {
> struct intel_iommu *iommu = info->iommu;
> struct context_entry *context;
> - u16 did_old;
>
> spin_lock(&iommu->lock);
> context = iommu_context_addr(iommu, bus, devfn, 0);
> @@ -1968,24 +1952,10 @@ static void domain_context_clear_one(struct device_domain_info *info, u8 bus, u8
> return;
> }
>
> - did_old = context_domain_id(context);
> -
static inline int context_domain_id(struct context_entry *c)
{
return((c->hi >> 8) & 0xffff);
}
> context_clear_entry(context);
static inline void context_clear_entry(struct context_entry *context)
{
context->lo = 0;
context->hi = 0;
}
> __iommu_flush_cache(iommu, context, sizeof(*context));
> spin_unlock(&iommu->lock);
> - iommu->flush.flush_context(iommu,
> - did_old,
> - (((u16)bus) << 8) | devfn,
> - DMA_CCMD_MASK_NOBIT,
> - DMA_CCMD_DEVICE_INVL);
> -
> - iommu->flush.flush_iotlb(iommu,
> - did_old,
> - 0,
> - 0,
> - DMA_TLB_DSI_FLUSH);
> -
> - __iommu_flush_dev_iotlb(info, 0, MAX_AGAW_PFN_WIDTH);
> + intel_context_flush_present(info, context, true);
> }
>
> static int domain_setup_first_level(struct intel_iommu *iommu,
> diff --git a/drivers/iommu/intel/pasid.c b/drivers/iommu/intel/pasid.c
> index aabcdf756581..d6623d2c2050 100644
> --- a/drivers/iommu/intel/pasid.c
> +++ b/drivers/iommu/intel/pasid.c
...
> +void intel_context_flush_present(struct device_domain_info *info,
> + struct context_entry *context,
> + bool flush_domains)
> +{
> + struct intel_iommu *iommu = info->iommu;
> + u16 did = context_domain_id(context);
Whoops, did is always zero here, intel_context_flush_present() precedes
all callers.
> + struct pasid_entry *pte;
> + int i;
> +
> + /*
> + * Device-selective context-cache invalidation. The Domain-ID field
> + * of the Context-cache Invalidate Descriptor is ignored by hardware
> + * when operating in scalable mode. Therefore the @did value doesn't
> + * matter in scalable mode.
> + */
> + iommu->flush.flush_context(iommu, did, PCI_DEVID(info->bus, info->devfn),
^^^ Bogus
> + DMA_CCMD_MASK_NOBIT, DMA_CCMD_DEVICE_INVL);
> +
> + /*
> + * For legacy mode:
> + * - Domain-selective IOTLB invalidation
> + * - Global Device-TLB invalidation to all affected functions
> + */
> + if (!sm_supported(iommu)) {
> + iommu->flush.flush_iotlb(iommu, did, 0, 0, DMA_TLB_DSI_FLUSH);
^^^ etc...
> + __context_flush_dev_iotlb(info);
> +
> + return;
> + }
Thanks,
Alex
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