[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-ID: <20240814081126.956287-1-samuel.holland@sifive.com>
Date: Wed, 14 Aug 2024 01:10:53 -0700
From: Samuel Holland <samuel.holland@...ive.com>
To: linux-riscv@...ts.infradead.org,
Palmer Dabbelt <palmer@...belt.com>
Cc: Andrew Jones <ajones@...tanamicro.com>,
Conor Dooley <conor@...nel.org>,
linux-kernel@...r.kernel.org,
Deepak Gupta <debug@...osinc.com>,
Samuel Holland <samuel.holland@...ive.com>,
Albert Ou <aou@...s.berkeley.edu>,
Andy Chiu <andy.chiu@...ive.com>,
Charlie Jenkins <charlie@...osinc.com>,
Clément Léger <cleger@...osinc.com>,
Conor Dooley <conor.dooley@...rochip.com>,
Evan Green <evan@...osinc.com>,
Greentime Hu <greentime.hu@...ive.com>,
Guo Ren <guoren@...nel.org>,
Leonardo Bras <leobras@...hat.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Sunil V L <sunilvl@...tanamicro.com>,
Thomas Gleixner <tglx@...utronix.de>,
Xiao Wang <xiao.w.wang@...el.com>,
Zhao Ke <ke.zhao@...ngroup.cn>
Subject: [PATCH v4 0/3] riscv: Per-thread envcfg CSR support
This series (or equivalent) is a prerequisite for both user-mode pointer
masking and CFI support, as both of those are per-thread features and
are controlled by fields in the envcfg CSR. These patches are based on
v1 of the pointer masking series[1], with significant input from both
Deepak and Andrew.
[1]: https://lore.kernel.org/linux-riscv/20240319215915.832127-6-samuel.holland@sifive.com/
Changes in v4:
- Rebase on riscv/for-next (v6.11-rc)
- Add Conor's Reviewed-by tags from v2 (missed in v3)
Changes in v3:
- Rebase on riscv/for-next
- Drop use of __initdata due to conflicts with cpufeature.c refactoring
Changes in v2:
- Rebase on riscv/for-next
Samuel Holland (3):
riscv: Enable cbo.zero only when all harts support Zicboz
riscv: Add support for per-thread envcfg CSR values
riscv: Call riscv_user_isa_enable() only on the boot hart
arch/riscv/include/asm/cpufeature.h | 2 +-
arch/riscv/include/asm/processor.h | 1 +
arch/riscv/include/asm/switch_to.h | 8 ++++++++
arch/riscv/kernel/cpufeature.c | 11 ++++++++---
arch/riscv/kernel/smpboot.c | 2 --
arch/riscv/kernel/suspend.c | 4 ++--
6 files changed, 20 insertions(+), 8 deletions(-)
--
2.45.1
Powered by blists - more mailing lists