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Message-Id: <20240815065221.50328-1-tina.zhang@intel.com>
Date: Thu, 15 Aug 2024 14:52:17 +0800
From: Tina Zhang <tina.zhang@...el.com>
To: Lu Baolu <baolu.lu@...ux.intel.com>,
	Kevin Tian <kevin.tian@...el.com>
Cc: iommu@...ts.linux.dev,
	linux-kernel@...r.kernel.org,
	Tina Zhang <tina.zhang@...el.com>
Subject: [PATCH v3 0/4] Batch IOTLB/dev-IOTLB invalidation

IOTLB and dev-IOTLB invalidation operations are performance-critical.
The current implementation in the VT-d driver submits these commands
individually, leading to some inefficiencies due to the IOMMU
programming and invalidation command processing overhead for each
operation.

This patch series enhances the efficiency of Queue Invalidation (QI)
operations by adding support for batch processing. Microbenchmarks
show that with a DSA device working in SVA, batching IOTLB and dev-IOTLB
invalidations can decrease the time spent in qi_submit_sync()
by roughly more than 800 cycles.

Changelog
v3:
 * Rebased on 6.11-rc3.
 * Updated commit messages which are revised by Baolu.
 * Dropped the refactoring quirk_extra_dev_tlb_flush() patch.
 * Added "Add qi_batch for dmar_domain" patch which is provided by Baolu.

v2:
 * Rebased on 6.11-rc2.
 * Updated commit messages.
 * Added changes of refactoring IOTLB/Dev-IOTLB invalidation logic
   and quirk_extra_dev_tlb_flush() logic.

v1:
 https://lore.kernel.org/linux-iommu/20240517003728.251115-1-tina.zhang@intel.com/

Lu Baolu (1):
  iommu/vt-d: Add qi_batch for dmar_domain

Tina Zhang (3):
  iommu/vt-d: Factor out invalidation descriptor composition
  iommu/vt-d: Refactor IOTLB and Dev-IOTLB flush for batching
  iommu/vt-d: Introduce batched cache invalidation

 drivers/iommu/intel/cache.c  | 239 ++++++++++++++++++++++++++---------
 drivers/iommu/intel/dmar.c   |  93 +-------------
 drivers/iommu/intel/iommu.c  |   6 +-
 drivers/iommu/intel/iommu.h  | 126 ++++++++++++++++++
 drivers/iommu/intel/nested.c |   1 +
 drivers/iommu/intel/svm.c    |   5 +-
 6 files changed, 316 insertions(+), 154 deletions(-)

-- 
2.34.1


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