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Message-ID: <20240815-handsaw-estranged-f9f33c533564@spud>
Date: Thu, 15 Aug 2024 15:01:14 +0100
From: Conor Dooley <conor@...nel.org>
To: devicetree@...r.kernel.org
Cc: conor@...nel.org,
Conor Dooley <conor.dooley@...rochip.com>,
Lee Jones <lee@...nel.org>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
linux-kernel@...r.kernel.org
Subject: [RFC PATCH 11/11] riscv: dts: microchip: convert clock and reset (TODO: fixup phandle)
From: Conor Dooley <conor.dooley@...rochip.com>
Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>
---
arch/riscv/boot/dts/microchip/mpfs.dtsi | 22 +++++++++++++---------
1 file changed, 13 insertions(+), 9 deletions(-)
diff --git a/arch/riscv/boot/dts/microchip/mpfs.dtsi b/arch/riscv/boot/dts/microchip/mpfs.dtsi
index 1d655126b66f..6c5b6fef313f 100644
--- a/arch/riscv/boot/dts/microchip/mpfs.dtsi
+++ b/arch/riscv/boot/dts/microchip/mpfs.dtsi
@@ -254,14 +254,11 @@ pdma: dma-controller@...0000 {
mss_top_scb: syscon@...02000 {
compatible = "microchip,mpfs-mss-top-sysreg", "syscon", "simple-mfd";
reg = <0x0 0x20002000 0x0 0x1000>;
- };
- clkcfg: clkcfg@...02000 {
- compatible = "microchip,mpfs-clkcfg";
- reg = <0x0 0x20002000 0x0 0x1000>, <0x0 0x3E001000 0x0 0x1000>;
- clocks = <&refclk>;
- #clock-cells = <1>;
- #reset-cells = <1>;
+ rst: reset-controller {
+ compatible = "microchip,mpfs-reset";
+ #reset-cells = <1>;
+ };
};
sysreg_scb: syscon@...03000 {
@@ -457,7 +454,7 @@ mac0: ethernet@...10000 {
local-mac-address = [00 00 00 00 00 00];
clocks = <&clkcfg CLK_MAC0>, <&clkcfg CLK_AHB>;
clock-names = "pclk", "hclk";
- resets = <&clkcfg CLK_MAC0>;
+ resets = <&rst CLK_MAC0>;
status = "disabled";
};
@@ -471,7 +468,7 @@ mac1: ethernet@...12000 {
local-mac-address = [00 00 00 00 00 00];
clocks = <&clkcfg CLK_MAC1>, <&clkcfg CLK_AHB>;
clock-names = "pclk", "hclk";
- resets = <&clkcfg CLK_MAC1>;
+ resets = <&rst CLK_MAC1>;
status = "disabled";
};
@@ -559,5 +556,12 @@ syscontroller_qspi: spi@...20100 {
clocks = <&scbclk>;
status = "disabled";
};
+
+ clkcfg: clkcfg@...01000 {
+ compatible = "microchip,mpfs-clkcfg";
+ reg = <0x0 0x3e001000 0x0 0x1000>;
+ clocks = <&refclk>;
+ #clock-cells = <1>;
+ };
};
};
--
2.43.0
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