linux-kernel - [PATCH 0/7] x86/resctrl : Support L3 Smart Data Cache Injection Allocation Enforcement (SDCIAE)

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Message-ID: <cover.1723824984.git.babu.moger@amd.com>
Date: Fri, 16 Aug 2024 11:16:17 -0500
From: Babu Moger <babu.moger@....com>
To: <corbet@....net>, <reinette.chatre@...el.com>, <tglx@...utronix.de>,
	<mingo@...hat.com>, <bp@...en8.de>, <dave.hansen@...ux.intel.com>,
	<x86@...nel.org>
CC: <fenghua.yu@...el.com>, <hpa@...or.com>, <paulmck@...nel.org>,
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Subject: [PATCH 0/7] x86/resctrl : Support L3 Smart Data Cache Injection Allocation Enforcement (SDCIAE)

This series adds the support for L3 Smart Data Cache Injection Allocation
Enforcement (SDCIAE) to resctrl infrastructure. 

Upcoming AMD hardware implements Smart Data Cache Injection (SDCI).
Smart Data Cache Injection (SDCI) is a mechanism that enables direct
insertion of data from I/O devices into the L3 cache. By directly caching
data from I/O devices rather than first storing the I/O data in DRAM, SDCI
reduces demands on DRAM bandwidth and reduces latency to the processor
consuming the I/O data. The SDCIAE (SDCI Allocation Enforcement) PQE
feature allows system software to limit the portion of the L3 cache used
for SDCI.

The feature details are documented in the APM listed below [1].
[1] AMD64 Architecture Programmer's Manual Volume 2: System Programming
Publication # 24593 Revision 3.41 section 19.4.7 L3 Smart Data Cache
Injection Allocation Enforcement (SDCIAE)
Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537

The feature requires linux support of TPH (TLP Processing Hints).
The support is ongoing and patches are currently under review.
https://lore.kernel.org/lkml/20240717205511.2541693-2-wei.huang2@amd.com/

The patches are based on top of commit
ad1b4b6ed19f (tip/master) Merge branch into tip/master: 'x86/timers'

Babu Moger (7):
  x86/cpufeatures: Add support for L3 Smart Data Cache Injection
    Allocation Enforcement
  x86/resctrl: Add SDCIAE feature in the command line options
  x86/resctrl: Introduce sdciae_capable in rdt_resource
  x86/resctrl: Implement SDCIAE enable/disable
  x86/resctrl: Add interface to enable/disable SDCIAE
  x86/resctrl: Introduce interface to display SDCIAE Capacity Bit Masks
  x86/resctrl: Introduce interface to modify SDCIAE Capacity Bit Masks

 .../admin-guide/kernel-parameters.txt         |   2 +-
 Documentation/arch/x86/resctrl.rst            |  29 ++
 arch/x86/include/asm/cpufeatures.h            |   1 +
 arch/x86/include/asm/msr-index.h              |   1 +
 arch/x86/kernel/cpu/cpuid-deps.c              |   1 +
 arch/x86/kernel/cpu/resctrl/core.c            |  10 +
 arch/x86/kernel/cpu/resctrl/ctrlmondata.c     |   4 +-
 arch/x86/kernel/cpu/resctrl/internal.h        |  15 +
 arch/x86/kernel/cpu/resctrl/rdtgroup.c        | 298 ++++++++++++++++++
 arch/x86/kernel/cpu/scattered.c               |   1 +
 include/linux/resctrl.h                       |   2 +
 11 files changed, 361 insertions(+), 3 deletions(-)

-- 
2.34.1