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Message-Id: <20240816092417.3651434-28-Delphine_CC_Chiu@wiwynn.com>
Date: Fri, 16 Aug 2024 17:24:14 +0800
From: Delphine CC Chiu <Delphine_CC_Chiu@...ynn.com>
To: patrick@...cx.xyz,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Joel Stanley <joel@....id.au>,
Andrew Jeffery <andrew@...econstruct.com.au>
Cc: Delphine CC Chiu <Delphine_CC_Chiu@...ynn.com>,
devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-aspeed@...ts.ozlabs.org,
linux-kernel@...r.kernel.org
Subject: [PATCH v12 27/28] ARM: dts: aspeed: yosemite4: Adjust ioexp bus and remove mctp driver
Adjust CPLD io expender for PVT stage.
Add GPIO name for GPIOO7.
Only binding MCTP driver on the down-stream port of the mux.
Remove unnecessary driver binding since there's no MCTP device before the mux.
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@...ynn.com>
---
.../aspeed/aspeed-bmc-facebook-yosemite4.dts | 59 +++++++++----------
1 file changed, 29 insertions(+), 30 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index f139f426099e..abd4a9173de4 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -1156,6 +1156,34 @@ rtc@6f {
compatible = "nuvoton,nct3018y";
reg = <0x6f>;
};
+
+ gpio@20 {
+ compatible = "nxp,pca9506";
+ reg = <0x20>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@21 {
+ compatible = "nxp,pca9506";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@22 {
+ compatible = "nxp,pca9506";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@23 {
+ compatible = "nxp,pca9506";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
};
imux35: i2c@1 {
@@ -1188,34 +1216,6 @@ ipmb@10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
i2c-protocol;
};
-
- gpio@20 {
- compatible = "nxp,pca9506";
- reg = <0x20>;
- gpio-controller;
- #gpio-cells = <2>;
- };
-
- gpio@21 {
- compatible = "nxp,pca9506";
- reg = <0x21>;
- gpio-controller;
- #gpio-cells = <2>;
- };
-
- gpio@22 {
- compatible = "nxp,pca9506";
- reg = <0x22>;
- gpio-controller;
- #gpio-cells = <2>;
- };
-
- gpio@23 {
- compatible = "nxp,pca9506";
- reg = <0x23>;
- gpio-controller;
- #gpio-cells = <2>;
- };
};
&i2c14 {
@@ -1470,7 +1470,6 @@ adc@35 {
&i2c15 {
status = "okay";
- mctp-controller;
multi-master;
bus-frequency = <400000>;
i2c-clk-high-min-percent = <40>;
@@ -1680,7 +1679,7 @@ &pinctrl_gpio3_unbiased &pinctrl_gpio4_unbiased
"FM_BMC_READY_R2","RST_SMB_NIC0_R_N","","",
/*O0-O7*/ "AC_ON_OFF_BTN_CPLD_SLOT8_N","RST_SMB_NIC1_R_N",
"RST_SMB_NIC2_R_N","RST_SMB_NIC3_R_N",
- "","","","",
+ "","","","FM_BMC_SLED_CYCLE_R",
/*P0-P7*/ "ALT_SMB_BMC_CPLD1_N","BTN_BMC_R2_N",
"EN_P3V_BAT_SCALED_R","PWRGD_P5V_USB_BMC",
"FM_BMC_RTCRST_R","RST_USB_HUB_R_N",
--
2.25.1
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