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Message-ID: <20240817145058.GCZsC40neU4wkPXeVR@fat_crate.local>
Date: Sat, 17 Aug 2024 16:50:58 +0200
From: Borislav Petkov <bp@...en8.de>
To: Babu Moger <babu.moger@....com>
Cc: corbet@....net, reinette.chatre@...el.com, tglx@...utronix.de,
	mingo@...hat.com, dave.hansen@...ux.intel.com, x86@...nel.org,
	fenghua.yu@...el.com, hpa@...or.com, paulmck@...nel.org,
	thuth@...hat.com, xiongwei.song@...driver.com, ardb@...nel.org,
	pawan.kumar.gupta@...ux.intel.com, daniel.sneddon@...ux.intel.com,
	sandipan.das@....com, kai.huang@...el.com, peterz@...radead.org,
	kan.liang@...ux.intel.com, pbonzini@...hat.com, xin3.li@...el.com,
	ebiggers@...gle.com, alexandre.chartre@...cle.com,
	perry.yuan@....com, tan.shaopeng@...itsu.com, james.morse@....com,
	tony.luck@...el.com, maciej.wieczor-retman@...el.com,
	linux-doc@...r.kernel.org, linux-kernel@...r.kernel.org,
	peternewman@...gle.com, eranian@...gle.com
Subject: Re: [PATCH 1/7] x86/cpufeatures: Add support for L3 Smart Data Cache
 Injection Allocation Enforcement

On Fri, Aug 16, 2024 at 11:16:18AM -0500, Babu Moger wrote:
> diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
> index dd4682857c12..5ca39431d423 100644
> --- a/arch/x86/include/asm/cpufeatures.h
> +++ b/arch/x86/include/asm/cpufeatures.h
> @@ -473,6 +473,7 @@
>  #define X86_FEATURE_CLEAR_BHB_HW	(21*32+ 3) /* BHI_DIS_S HW control enabled */
>  #define X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT (21*32+ 4) /* Clear branch history at vmexit using SW loop */
>  #define X86_FEATURE_FAST_CPPC		(21*32 + 5) /* AMD Fast CPPC */
> +#define X86_FEATURE_SDCIAE		(21*32 + 6) /* "" L3 Smart Data Cache Injection Allocation Enforcement */

The "" is not needed anymore - feature flags are automatically NOT added
to /proc/cpuinfo.

-- 
Regards/Gruss,
    Boris.

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