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Message-Id: <20240819-b4-rk3588-bridge-upstream-v4-1-6417c72a2749@collabora.com>
Date: Mon, 19 Aug 2024 01:29:28 +0300
From: Cristian Ciocaltea <cristian.ciocaltea@...labora.com>
To: Andrzej Hajda <andrzej.hajda@...el.com>,
Neil Armstrong <neil.armstrong@...aro.org>, Robert Foss <rfoss@...nel.org>,
Laurent Pinchart <Laurent.pinchart@...asonboard.com>,
Jonas Karlman <jonas@...boo.se>, Jernej Skrabec <jernej.skrabec@...il.com>,
Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
Maxime Ripard <mripard@...nel.org>, Thomas Zimmermann <tzimmermann@...e.de>,
David Airlie <airlied@...il.com>, Daniel Vetter <daniel@...ll.ch>,
Sandy Huang <hjc@...k-chips.com>,
Heiko Stübner <heiko@...ech.de>,
Andy Yan <andy.yan@...k-chips.com>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Mark Yao <markyao0591@...il.com>,
Sascha Hauer <s.hauer@...gutronix.de>
Cc: dri-devel@...ts.freedesktop.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-rockchip@...ts.infradead.org,
devicetree@...r.kernel.org, kernel@...labora.com,
Alexandre ARNOUD <aarnoud@...com>, Luis de Arquer <ldearquer@...il.com>
Subject: [PATCH v4 1/4] dt-bindings: display: bridge: Add schema for
Synopsys DW HDMI QP TX IP
Add dt-binding schema containing the common properties for the Synopsys
DesignWare HDMI QP TX controller.
Note this is not a full dt-binding specification, but is meant to be
referenced by platform-specific bindings for this IP core.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@...labora.com>
---
.../display/bridge/synopsys,dw-hdmi-qp.yaml | 88 ++++++++++++++++++++++
1 file changed, 88 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/bridge/synopsys,dw-hdmi-qp.yaml b/Documentation/devicetree/bindings/display/bridge/synopsys,dw-hdmi-qp.yaml
new file mode 100644
index 000000000000..771f7fba6c50
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/bridge/synopsys,dw-hdmi-qp.yaml
@@ -0,0 +1,88 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/bridge/synopsys,dw-hdmi-qp.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Common Properties for Synopsys DesignWare HDMI QP TX Controller IP
+
+maintainers:
+ - Cristian Ciocaltea <cristian.ciocaltea@...labora.com>
+
+description: |
+ The Synopsys DesignWare HDMI 2.1 Quad-Pixel (QP) TX Controller IP core
+ supports the following features, among others:
+
+ * Fixed Rate Link (FRL)
+ * Display Stream Compression (DSC)
+ * 4K@...Hz and 8K@...z video modes
+ * Variable Refresh Rate (VRR) including Quick Media Switching (QMS)
+ * Fast Vactive (FVA)
+ * SCDC I2C DDC access
+ * Multi-stream audio
+ * Enhanced Audio Return Channel (EARC)
+
+ Note this is not a full dt-binding specification, but is meant to be
+ referenced by platform-specific bindings for this IP core.
+
+properties:
+ reg:
+ maxItems: 1
+
+ clocks:
+ minItems: 4
+ maxItems: 6
+ items:
+ - description: Peripheral/APB bus clock
+ - description: EARC RX biphase clock
+ - description: Reference clock
+ - description: Audio interface clock
+ additionalItems: true
+
+ clock-names:
+ minItems: 4
+ maxItems: 6
+ items:
+ - const: pclk
+ - const: earc
+ - const: ref
+ - const: aud
+ additionalItems: true
+
+ interrupts:
+ minItems: 4
+ maxItems: 5
+ items:
+ - description: AVP Unit interrupt
+ - description: CEC interrupt
+ - description: eARC RX interrupt
+ - description: Main Unit interrupt
+ additionalItems: true
+
+ interrupt-names:
+ minItems: 4
+ maxItems: 5
+ items:
+ - const: avp
+ - const: cec
+ - const: earc
+ - const: main
+ additionalItems: true
+
+ ports:
+ $ref: /schemas/graph.yaml#/properties/ports
+
+ properties:
+ port@0:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: Video port for RGB/YUV input.
+
+ port@1:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: Video port for HDMI/eDP output.
+
+ required:
+ - port@0
+ - port@1
+
+additionalProperties: true
--
2.46.0
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