linux-kernel - Re: [PATCH 09/10] arm64: dts: rockchip: Add rk3576 SoC base DT

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Message-ID: <23696360.6Emhk5qWAg@trenzalore>
Date: Mon, 19 Aug 2024 13:59:45 -0400
From: Detlev Casanova <detlev.casanova@...labora.com>
To: linux-kernel@...r.kernel.org,
 Heiko Stübner <heiko@...ech.de>
Cc: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
 Conor Dooley <conor+dt@...nel.org>, Andi Shyti <andi.shyti@...nel.org>,
 Jonathan Cameron <jic23@...nel.org>, Lars-Peter Clausen <lars@...afoo.de>,
 Lee Jones <lee@...nel.org>, Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
 Jiri Slaby <jirislaby@...nel.org>,
 Daniel Lezcano <daniel.lezcano@...aro.org>,
 Thomas Gleixner <tglx@...utronix.de>, Chris Morgan <macromorgan@...mail.com>,
 Jonas Karlman <jonas@...boo.se>, Tim Lunn <tim@...thertop.org>,
 Muhammed Efe Cetin <efectn@...tonmail.com>, Andy Yan <andyshrk@....com>,
 Jagan Teki <jagan@...eble.ai>, Dragan Simic <dsimic@...jaro.org>,
 Sebastian Reichel <sebastian.reichel@...labora.com>,
 Shresth Prasad <shresthprasad7@...il.com>, Ondrej Jirman <megi@....cz>,
 Weizhao Ouyang <weizhao.ouyang@....com>, Alexey Charkov <alchark@...il.com>,
 Jimmy Hon <honyuenkwun@...il.com>, Finley Xiao <finley.xiao@...k-chips.com>,
 Yifeng Zhao <yifeng.zhao@...k-chips.com>,
 Elaine Zhang <zhangqing@...k-chips.com>, Liang Chen <cl@...k-chips.com>,
 devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
 linux-rockchip@...ts.infradead.org, linux-i2c@...r.kernel.org,
 linux-iio@...r.kernel.org, linux-serial@...r.kernel.org, kernel@...labora.com
Subject: Re: [PATCH 09/10] arm64: dts: rockchip: Add rk3576 SoC base DT

On Wednesday, 14 August 2024 11:31:04 EDT Heiko Stübner wrote:
> Hi Detlev,
> 
> Am Freitag, 2. August 2024, 23:45:36 CEST schrieb Detlev Casanova:
> > This device tree contains all devices necessary for booting from network
> > or SD Card.
> > 
> > It supports CPU, CRU, PM domains, dma, interrupts, timers, UART and
> > SDHCI (everything necessary to boot Linux on this system on chip) as
> > well as Ethernet, I2C, SPI and OTP.
> > 
> > Also add the necessary DT bindings for the SoC.
> > 
> > Signed-off-by: Liang Chen <cl@...k-chips.com>
> > Signed-off-by: Finley Xiao <finley.xiao@...k-chips.com>
> > Signed-off-by: Yifeng Zhao <yifeng.zhao@...k-chips.com>
> > Signed-off-by: Elaine Zhang <zhangqing@...k-chips.com>
> > [rebase, squash and reword commit message]
> > Signed-off-by: Detlev Casanova <detlev.casanova@...labora.com>
> 
> looks like (since 2019) there is a strong suggestion for having a soc node.
> 
> See Krzysztof's mail in
>    
> https://lore.kernel.org/all/6320e4f3-e737-4787-8a72-7bd314ba883c@kernel.org
> / that references
>     Documentation/devicetree/bindings/writing-bindings.rst [0]
> 
> So I guess we should probably follow that - at least for new socs for now.

That make sense, but what is exactly covered by MMIO devices ? everything 
except cpus, firmware, psci and timer ?

> Heiko
> 
> [0]
> https://elixir.bootlin.com/linux/v6.11-rc1/source/Documentation/devicetree/
> bindings/writing-bindings.rst#L90