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Message-ID: <20240819182811.GR2032816@nvidia.com>
Date: Mon, 19 Aug 2024 15:28:11 -0300
From: Jason Gunthorpe <jgg@...dia.com>
To: Nicolin Chen <nicolinc@...dia.com>
Cc: kevin.tian@...el.com, will@...nel.org, joro@...tes.org,
	suravee.suthikulpanit@....com, robin.murphy@....com,
	dwmw2@...radead.org, baolu.lu@...ux.intel.com, shuah@...nel.org,
	linux-kernel@...r.kernel.org, iommu@...ts.linux.dev,
	linux-arm-kernel@...ts.infradead.org,
	linux-kselftest@...r.kernel.org
Subject: Re: [PATCH v1 15/16] iommu/arm-smmu-v3: Add viommu cache
 invalidation support

On Mon, Aug 19, 2024 at 11:19:39AM -0700, Nicolin Chen wrote:

> > But nesting enablment with out viommu is alot less useful than I had
> > thought :(
> 
> Actually, without viommu, the hwpt cache invalidate alone could
> still support non-SVA case?

That is what I thought, but doesn't the guest still have to invalidate
the CD table entry # 0?

> Though we still have the blocker at the msi mapping... It still
> requires a solution, even for viommu series.

Yes, small steps. The point of this step was to get the nested paging
only (without msi, pri, etc, etc)

Jason

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