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Message-ID: <vjtfwuxkkml2d6jf7sela2oocdme3s27qgymsgk5vosdkrzvxc@wckgz35siylj>
Date: Mon, 19 Aug 2024 22:20:13 +0200
From: Andi Shyti <andi.shyti@...nel.org>
To: Claudiu <claudiu.beznea@...on.dev>
Cc: chris.brandt@...esas.com, robh@...nel.org, krzk+dt@...nel.org, 
	conor+dt@...nel.org, geert+renesas@...der.be, magnus.damm@...il.com, 
	p.zabel@...gutronix.de, wsa+renesas@...g-engineering.com, 
	linux-renesas-soc@...r.kernel.org, linux-i2c@...r.kernel.org, devicetree@...r.kernel.org, 
	linux-kernel@...r.kernel.org, Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
Subject: Re: [PATCH v4 06/11] i2c: riic: Define individual arrays to describe
 the register offsets

Geert,

do you have any comment here?

Thanks,
Andi

On Mon, Aug 19, 2024 at 01:23:43PM GMT, Claudiu wrote:
> From: Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
> 
> Define individual arrays to describe the register offsets. In this way
> we can describe different IP variants that share the same register offsets
> but have differences in other characteristics. Commit prepares for the
> addition of fast mode plus.
> 
> Reviewed-by: Wolfram Sang <wsa+renesas@...g-engineering.com>
> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
> ---
> 
> Changes in v4:
> - collected tags
> 
> Changes in v3:
> - none
> 
> Changes in v2:
> - none
> 
>  drivers/i2c/busses/i2c-riic.c | 58 +++++++++++++++++++----------------
>  1 file changed, 31 insertions(+), 27 deletions(-)
> 
> diff --git a/drivers/i2c/busses/i2c-riic.c b/drivers/i2c/busses/i2c-riic.c
> index f863b367fb85..cc2452853d19 100644
> --- a/drivers/i2c/busses/i2c-riic.c
> +++ b/drivers/i2c/busses/i2c-riic.c
> @@ -91,7 +91,7 @@ enum riic_reg_list {
>  };
>  
>  struct riic_of_data {
> -	u8 regs[RIIC_REG_END];
> +	const u8 *regs;
>  };
>  
>  struct riic_dev {
> @@ -522,36 +522,40 @@ static void riic_i2c_remove(struct platform_device *pdev)
>  	pm_runtime_dont_use_autosuspend(dev);
>  }
>  
> +static const u8 riic_rz_a_regs[RIIC_REG_END] = {
> +	[RIIC_ICCR1] = 0x00,
> +	[RIIC_ICCR2] = 0x04,
> +	[RIIC_ICMR1] = 0x08,
> +	[RIIC_ICMR3] = 0x10,
> +	[RIIC_ICSER] = 0x18,
> +	[RIIC_ICIER] = 0x1c,
> +	[RIIC_ICSR2] = 0x24,
> +	[RIIC_ICBRL] = 0x34,
> +	[RIIC_ICBRH] = 0x38,
> +	[RIIC_ICDRT] = 0x3c,
> +	[RIIC_ICDRR] = 0x40,
> +};
> +
>  static const struct riic_of_data riic_rz_a_info = {
> -	.regs = {
> -		[RIIC_ICCR1] = 0x00,
> -		[RIIC_ICCR2] = 0x04,
> -		[RIIC_ICMR1] = 0x08,
> -		[RIIC_ICMR3] = 0x10,
> -		[RIIC_ICSER] = 0x18,
> -		[RIIC_ICIER] = 0x1c,
> -		[RIIC_ICSR2] = 0x24,
> -		[RIIC_ICBRL] = 0x34,
> -		[RIIC_ICBRH] = 0x38,
> -		[RIIC_ICDRT] = 0x3c,
> -		[RIIC_ICDRR] = 0x40,
> -	},
> +	.regs = riic_rz_a_regs,
> +};
> +
> +static const u8 riic_rz_v2h_regs[RIIC_REG_END] = {
> +	[RIIC_ICCR1] = 0x00,
> +	[RIIC_ICCR2] = 0x01,
> +	[RIIC_ICMR1] = 0x02,
> +	[RIIC_ICMR3] = 0x04,
> +	[RIIC_ICSER] = 0x06,
> +	[RIIC_ICIER] = 0x07,
> +	[RIIC_ICSR2] = 0x09,
> +	[RIIC_ICBRL] = 0x10,
> +	[RIIC_ICBRH] = 0x11,
> +	[RIIC_ICDRT] = 0x12,
> +	[RIIC_ICDRR] = 0x13,
>  };
>  
>  static const struct riic_of_data riic_rz_v2h_info = {
> -	.regs = {
> -		[RIIC_ICCR1] = 0x00,
> -		[RIIC_ICCR2] = 0x01,
> -		[RIIC_ICMR1] = 0x02,
> -		[RIIC_ICMR3] = 0x04,
> -		[RIIC_ICSER] = 0x06,
> -		[RIIC_ICIER] = 0x07,
> -		[RIIC_ICSR2] = 0x09,
> -		[RIIC_ICBRL] = 0x10,
> -		[RIIC_ICBRH] = 0x11,
> -		[RIIC_ICDRT] = 0x12,
> -		[RIIC_ICDRR] = 0x13,
> -	},
> +	.regs = riic_rz_v2h_regs,
>  };
>  
>  static int riic_i2c_suspend(struct device *dev)
> -- 
> 2.39.2
> 

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