linux-kernel - Re: [PATCH v3 3/5] dt-bindings: arm: Add Coresight TMC Control Unit hardware

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Message-ID: <ZsMVYBR3hx3moZnV@jiegan-gv.ap.qualcomm.com>
Date: Mon, 19 Aug 2024 17:50:24 +0800
From: JieGan <quic_jiegan@...cinc.com>
To: Krzysztof Kozlowski <krzk@...nel.org>
CC: Suzuki K Poulose <suzuki.poulose@....com>,
        Mike Leach
	<mike.leach@...aro.org>,
        James Clark <james.clark@...aro.org>,
        "Alexander
 Shishkin" <alexander.shishkin@...ux.intel.com>,
        Maxime Coquelin
	<mcoquelin.stm32@...il.com>,
        Alexandre Torgue <alexandre.torgue@...s.st.com>,
        Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konrad.dybcio@...aro.org>,
        Jinlong Mao
	<quic_jinlmao@...cinc.com>, <coresight@...ts.linaro.org>,
        <linux-arm-kernel@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
        <devicetree@...r.kernel.org>,
        Tingwei Zhang <quic_tingweiz@...cinc.com>,
        Yuanfang Zhang <quic_yuanfang@...cinc.com>,
        Tao Zhang
	<quic_taozha@...cinc.com>,
        Song Chai <quic_songchai@...cinc.com>, <linux-arm-msm@...r.kernel.org>,
        <linux-stm32@...md-mailman.stormreply.com>
Subject: Re: [PATCH v3 3/5] dt-bindings: arm: Add Coresight TMC Control Unit
 hardware

On Mon, Aug 19, 2024 at 11:41:59AM +0200, Krzysztof Kozlowski wrote:
> On 19/08/2024 11:06, JieGan wrote:
> > On Mon, Aug 19, 2024 at 08:26:19AM +0200, Krzysztof Kozlowski wrote:
> >> On 12/08/2024 04:41, Jie Gan wrote:
> >>> +
> >>> +maintainers:
> >>> +  - Yuanfang Zhang <quic_yuanfang@...cinc.com>
> >>> +  - Mao Jinlong <quic_jinlmao@...cinc.com>
> >>> +  - Jie Gan <quic_jiegan@...cinc.com>
> >>> +
> >>> +description:
> >>> +  The Coresight TMC Control unit controls various Coresight behaviors.
> >>> +  It works as a helper device when connected to TMC ETR device.
> >>> +  It is responsible for controlling the data filter function based on
> >>> +  the source device's Trace ID for TMC ETR device. The trace data with
> >>> +  that Trace id can get into ETR's buffer while other trace data gets
> >>> +  ignored.
> >>> +
> >>> +properties:
> >>> +  compatible:
> >>> +    enum:
> >>> +      - qcom,sa8775p-ctcu
> >>> +
> >>> +  reg:
> >>> +    maxItems: 1
> >>> +
> >>> +  clocks:
> >>> +    maxItems: 1
> >>> +
> >>> +  clock-names:
> >>> +    items:
> >>> +      - const: apb
> >>> +
> >>> +  in-ports:
> >>> +    $ref: /schemas/graph.yaml#/properties/ports
> >>> +
> >>> +    patternProperties:
> >>> +      '^port(@[0-7])?$':
> >>
> >> I see only two ports in the example. How many are there in reality?
> > Existing projects can have a maximum of two ports. I used the range 0-7 as I consider
> > it unlikely to have more than 8 ports. Maybe it's intended as a large buffer for
> > futher design needs.
> 
> Please do not create buffers in the bindings. This must be specific, so [01]

Got it. I will update it to '^port(@[0-1])?$' in next version.

> 
> 

Thanks,
Jie