linux-kernel - [PATCH v2 3/3] arm64: dts: Add phyBOARD-Pollux dtso for rpmsg

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Message-ID: <20240820171848.177926-4-y.varakala@phytec.de>
Date: Tue, 20 Aug 2024 19:18:48 +0200
From: Yashwanth Varakala <y.varakala@...tec.de>
To: <shawnguo@...nel.org>, <s.hauer@...gutronix.de>, <kernel@...gutronix.de>,
	<festevam@...il.com>, <robh@...nel.org>, <krzk+dt@...nel.org>,
	<conor+dt@...nel.org>
CC: <imx@...ts.linux.dev>, <linux-arm-kernel@...ts.infradead.org>,
	<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
	<upstream@...ts.phytec.de>, <y.varakala@...tec.de>
Subject: [PATCH v2 3/3] arm64: dts: Add phyBOARD-Pollux dtso for rpmsg

Adds a devicetree containing reserved memory regions used for intercore
communication between A53 and M7 cores.

Signed-off-by: Yashwanth Varakala <y.varakala@...tec.de>
---
Changes in v2:
- Updated license.
- Updated devicetree properties.
- Replaced imx8mp-cm7 with core-m7 node name.
- Updated reserved-memory node unit addresses in ascending order.

 arch/arm64/boot/dts/freescale/Makefile        |  2 +
 .../dts/freescale/imx8mp-phycore-rpmsg.dtso   | 55 +++++++++++++++++++
 2 files changed, 57 insertions(+)
 create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-phycore-rpmsg.dtso

diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index dedea4b5c319..80cc87d50301 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -177,9 +177,11 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-phyboard-pollux-rdk.dtb
 imx8mp-phyboard-pollux-rdk-no-eth-dtbs += imx8mp-phyboard-pollux-rdk.dtb imx8mp-phycore-no-eth.dtbo
 imx8mp-phyboard-pollux-rdk-no-rtc-dtbs += imx8mp-phyboard-pollux-rdk.dtb imx8mp-phycore-no-rtc.dtbo
 imx8mp-phyboard-pollux-rdk-no-spiflash-dtbs += imx8mp-phyboard-pollux-rdk.dtb imx8mp-phycore-no-spiflash.dtbo
+imx8mp-phyboard-pollux-rdk-rpmsg-dtbs += imx8mp-phyboard-pollux-rdk.dtb imx8mp-phycore-rpmsg.dtbo
 dtb-$(CONFIG_ARCH_MXC) += imx8mp-phyboard-pollux-rdk-no-eth.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mp-phyboard-pollux-rdk-no-rtc.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mp-phyboard-pollux-rdk-no-spiflash.dtb
+dtb-$(CONFIG_ARCH_MXC) += imx8mp-phyboard-pollux-rdk-rpmsg.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mp-skov-revb-hdmi.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mp-skov-revb-lt6.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mp-skov-revb-mi1010ait-1cp1.dtb
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phycore-rpmsg.dtso b/arch/arm64/boot/dts/freescale/imx8mp-phycore-rpmsg.dtso
new file mode 100644
index 000000000000..f9fba558dcb0
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-phycore-rpmsg.dtso
@@ -0,0 +1,55 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Copyright (C) 2024 PHYTEC Messtechnik GmbH
+ * Author: Dominik Haller <d.haller@...tec.de>
+ * 	   Cem Tenruh <c.tenruh@...tec.de>
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/clock/imx8mp-clock.h>
+
+&{/} {
+	core-m7 {
+		compatible = "fsl,imx8mn-cm7";
+		clocks = <&clk IMX8MP_CLK_M7_DIV>;
+		mboxes = <&mu 0 1>,
+			<&mu 1 1>,
+			<&mu 3 1>;
+		mbox-names = "tx", "rx", "rxdb";
+		memory-region = <&vdevbuffer>, <&vdev0vring0>, <&vdev0vring1>, <&rsc_table>;
+	};
+
+	reserved-memory {
+		ranges;
+		#address-cells = <2>;
+		#size-cells = <2>;
+
+		vdev0vring0: vdev0vring0@...00000 {
+			no-map;
+			reg = <0 0x55000000 0 0x8000>;
+		};
+
+		vdev0vring1: vdev0vring1@...08000 {
+			no-map;
+			reg = <0 0x55008000 0 0x8000>;
+		};
+
+		rsc_table: rsc-table@...ff000 {
+			no-map;
+			reg = <0 0x550ff000 0 0x1000>;
+		};
+
+		vdevbuffer: vdevbuffer@...00000 {
+			compatible = "shared-dma-pool";
+			no-map;
+			reg = <0 0x55400000 0 0x100000>;
+		};
+
+		m7_reserved: m7@...00000 {
+			no-map;
+			reg = <0 0x80000000 0 0x1000000>;
+		};
+	};
+};
-- 
2.34.1