[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <f9ee4657-eea5-4a82-8e01-0396948ed755@linux.intel.com>
Date: Tue, 20 Aug 2024 15:37:07 +0800
From: Baolu Lu <baolu.lu@...ux.intel.com>
To: Yi Liu <yi.l.liu@...el.com>, Joerg Roedel <joro@...tes.org>,
Will Deacon <will@...nel.org>, Robin Murphy <robin.murphy@....com>,
Jason Gunthorpe <jgg@...pe.ca>, Kevin Tian <kevin.tian@...el.com>
Cc: baolu.lu@...ux.intel.com, iommu@...ts.linux.dev,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/1] iommu/vt-d: Unconditionally flush device TLB for
pasid table updates
On 2024/8/20 15:09, Yi Liu wrote:
> On 2024/8/20 11:02, Lu Baolu wrote:
>> The caching mode of an IOMMU is irrelevant to the behavior of the device
>> TLB. Previously, commit <304b3bde24b5> ("iommu/vt-d: Remove caching mode
>> check before device TLB flush") removed this redundant check in the
>> domain unmap path.
>>
>> Checking the caching mode before flushing the device TLB after a pasid
>> table entry is updated is unnecessary and can lead to inconsistent
>> behavior.
>>
>> Extends this consistency by removing the caching mode check in the pasid
>> table update path.
>
> I'm wondering if a fix tag is needed here. Before this patch, the guest
> kernel does not issue device TLB invalidation. This may be a problem for
> the emulated devices that support ATS capability. The cache in device
> side would be stale. Although some vIOMMU like QEMU virtual VT-d would
> notify the emulated devices to flush their cache when handling the unmap
> event. [1]. But this is not required by VT-d spec. So it's possible that
> other vIOMMU may not do it. So this patch appears to fix an issue, so a fix
> tag may be necessary. How about your thought?
It depends on whether this solves any real or potential issues.
Thanks,
baolu
Powered by blists - more mailing lists