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Message-ID: <20240820085517.435566-1-quic_gokulsri@quicinc.com>
Date: Tue, 20 Aug 2024 14:25:13 +0530
From: Gokul Sriram Palanisamy <quic_gokulsri@...cinc.com>
To: <andersson@...nel.org>, <krzk+dt@...nel.org>,
<linux-arm-msm@...r.kernel.org>, <linux-remoteproc@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>
CC: <quic_viswanat@...cinc.com>, <quic_mmanikan@...cinc.com>,
<quic_varada@...cinc.com>, <quic_srichara@...cinc.com>
Subject: [PATCH 0/4] Add new driver for WCSS secure PIL loading
This series depends on q6 clock removal series [1].
- Secure PIL is signed, split firmware images which only TrustZone (TZ) can
authenticate and load. Linux kernel will send a request to TZ to
authenticate and load the PIL images.
- When secure PIL support was added to the existing wcss PIL driver
earlier in [2], Bjorn suggested not to overload the existing WCSS
rproc driver [2], instead post a new driver for secure PIL alone.
This series adds a new secure PIL driver for the same.
[1] https://patchwork.kernel.org/project/linux-arm-msm/cover/20240820055618.267554-1-quic_gokulsri@quicinc.com/
[2] https://patchwork.kernel.org/project/linux-arm-msm/patch/1611984013-10201-3-git-send-email-gokulsri@codeaurora.org/
Manikanta Mylavarapu (3):
dt-bindings: remoteproc: qcom: document hexagon based WCSS secure PIL
arm64: dts: qcom: ipq5332: add nodes to bringup q6
arm64: dts: qcom: ipq9574: add nodes to bring up q6
Vignesh Viswanathan (1):
remoteproc: qcom: add hexagon based WCSS secure PIL driver
.../remoteproc/qcom,wcss-sec-pil.yaml | 125 ++++++
arch/arm64/boot/dts/qcom/ipq5332.dtsi | 62 +++
arch/arm64/boot/dts/qcom/ipq9574.dtsi | 58 +++
drivers/remoteproc/Kconfig | 22 ++
drivers/remoteproc/Makefile | 1 +
drivers/remoteproc/qcom_q6v5_wcss_sec.c | 360 ++++++++++++++++++
6 files changed, 628 insertions(+)
create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,wcss-sec-pil.yaml
create mode 100644 drivers/remoteproc/qcom_q6v5_wcss_sec.c
--
2.34.1
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