[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20240820101918.2384635-6-claudiu.beznea.uj@bp.renesas.com>
Date: Tue, 20 Aug 2024 13:19:12 +0300
From: Claudiu <claudiu.beznea@...on.dev>
To: chris.brandt@...esas.com,
andi.shyti@...nel.org,
robh@...nel.org,
krzk+dt@...nel.org,
conor+dt@...nel.org,
geert+renesas@...der.be,
magnus.damm@...il.com,
p.zabel@...gutronix.de,
wsa+renesas@...g-engineering.com
Cc: linux-renesas-soc@...r.kernel.org,
linux-i2c@...r.kernel.org,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
claudiu.beznea@...on.dev,
Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
Subject: [PATCH v5 05/11] i2c: riic: Add suspend/resume support
From: Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
Add suspend/resume support for the RIIC driver. This is necessary for the
Renesas RZ/G3S SoC which support suspend to deep sleep state where power
to most of the SoC components is turned off. As a result the I2C controller
needs to be reconfigured after suspend/resume. For this, the reset line
was stored in the driver private data structure as well as i2c timings.
The reset line and I2C timings are necessary to re-initialize the
controller after resume.
Reviewed-by: Andi Shyti <andi.shyti@...nel.org>
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
---
Changes in v5:
- collected tags
- added a comment on riic_i2c_resume() to explain why the reset
signal is asserted on failure path
Changes in v4:
- rebased on top of latest next
Changes in v3:
- none
Changes in v2:
- deassert the reset line in resume if riic_init_hw() fails as
if that happens there is no way to recover the controller
drivers/i2c/busses/i2c-riic.c | 73 +++++++++++++++++++++++++++++------
1 file changed, 62 insertions(+), 11 deletions(-)
diff --git a/drivers/i2c/busses/i2c-riic.c b/drivers/i2c/busses/i2c-riic.c
index ec854a525a0b..eb741d4b1005 100644
--- a/drivers/i2c/busses/i2c-riic.c
+++ b/drivers/i2c/busses/i2c-riic.c
@@ -105,6 +105,8 @@ struct riic_dev {
struct completion msg_done;
struct i2c_adapter adapter;
struct clk *clk;
+ struct reset_control *rstc;
+ struct i2c_timings i2c_t;
};
struct riic_irq_desc {
@@ -302,11 +304,12 @@ static const struct i2c_algorithm riic_algo = {
.functionality = riic_func,
};
-static int riic_init_hw(struct riic_dev *riic, struct i2c_timings *t)
+static int riic_init_hw(struct riic_dev *riic)
{
int ret;
unsigned long rate;
int total_ticks, cks, brl, brh;
+ struct i2c_timings *t = &riic->i2c_t;
struct device *dev = riic->adapter.dev.parent;
if (t->bus_freq_hz > I2C_MAX_FAST_MODE_FREQ) {
@@ -423,8 +426,6 @@ static int riic_i2c_probe(struct platform_device *pdev)
struct device *dev = &pdev->dev;
struct riic_dev *riic;
struct i2c_adapter *adap;
- struct i2c_timings i2c_t;
- struct reset_control *rstc;
int i, ret;
riic = devm_kzalloc(dev, sizeof(*riic), GFP_KERNEL);
@@ -441,16 +442,16 @@ static int riic_i2c_probe(struct platform_device *pdev)
return PTR_ERR(riic->clk);
}
- rstc = devm_reset_control_get_optional_exclusive(dev, NULL);
- if (IS_ERR(rstc))
- return dev_err_probe(dev, PTR_ERR(rstc),
+ riic->rstc = devm_reset_control_get_optional_exclusive(dev, NULL);
+ if (IS_ERR(riic->rstc))
+ return dev_err_probe(dev, PTR_ERR(riic->rstc),
"Error: missing reset ctrl\n");
- ret = reset_control_deassert(rstc);
+ ret = reset_control_deassert(riic->rstc);
if (ret)
return ret;
- ret = devm_add_action_or_reset(dev, riic_reset_control_assert, rstc);
+ ret = devm_add_action_or_reset(dev, riic_reset_control_assert, riic->rstc);
if (ret)
return ret;
@@ -479,14 +480,14 @@ static int riic_i2c_probe(struct platform_device *pdev)
init_completion(&riic->msg_done);
- i2c_parse_fw_timings(dev, &i2c_t, true);
+ i2c_parse_fw_timings(dev, &riic->i2c_t, true);
/* Default 0 to save power. Can be overridden via sysfs for lower latency. */
pm_runtime_set_autosuspend_delay(dev, 0);
pm_runtime_use_autosuspend(dev);
pm_runtime_enable(dev);
- ret = riic_init_hw(riic, &i2c_t);
+ ret = riic_init_hw(riic);
if (ret)
goto out;
@@ -496,7 +497,7 @@ static int riic_i2c_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, riic);
- dev_info(dev, "registered with %dHz bus speed\n", i2c_t.bus_freq_hz);
+ dev_info(dev, "registered with %dHz bus speed\n", riic->i2c_t.bus_freq_hz);
return 0;
out:
@@ -553,6 +554,55 @@ static const struct riic_of_data riic_rz_v2h_info = {
},
};
+static int riic_i2c_suspend(struct device *dev)
+{
+ struct riic_dev *riic = dev_get_drvdata(dev);
+ int ret;
+
+ ret = pm_runtime_resume_and_get(dev);
+ if (ret)
+ return ret;
+
+ i2c_mark_adapter_suspended(&riic->adapter);
+
+ /* Disable output on SDA, SCL pins. */
+ riic_clear_set_bit(riic, ICCR1_ICE, 0, RIIC_ICCR1);
+
+ pm_runtime_mark_last_busy(dev);
+ pm_runtime_put_sync(dev);
+
+ return reset_control_assert(riic->rstc);
+}
+
+static int riic_i2c_resume(struct device *dev)
+{
+ struct riic_dev *riic = dev_get_drvdata(dev);
+ int ret;
+
+ ret = reset_control_deassert(riic->rstc);
+ if (ret)
+ return ret;
+
+ ret = riic_init_hw(riic);
+ if (ret) {
+ /*
+ * In case this happens there is no way to recover from this
+ * state. The driver will remain loaded. We want to avoid
+ * keeping the reset line de-asserted for no reason.
+ */
+ reset_control_assert(riic->rstc);
+ return ret;
+ }
+
+ i2c_mark_adapter_resumed(&riic->adapter);
+
+ return 0;
+}
+
+static const struct dev_pm_ops riic_i2c_pm_ops = {
+ SYSTEM_SLEEP_PM_OPS(riic_i2c_suspend, riic_i2c_resume)
+};
+
static const struct of_device_id riic_i2c_dt_ids[] = {
{ .compatible = "renesas,riic-rz", .data = &riic_rz_a_info },
{ .compatible = "renesas,riic-r9a09g057", .data = &riic_rz_v2h_info },
@@ -565,6 +615,7 @@ static struct platform_driver riic_i2c_driver = {
.driver = {
.name = "i2c-riic",
.of_match_table = riic_i2c_dt_ids,
+ .pm = pm_ptr(&riic_i2c_pm_ops),
},
};
--
2.39.2
Powered by blists - more mailing lists