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Message-ID: <7E8109D4-A353-4FE3-9152-3C3C6CB7D634@sntech.de>
Date: Wed, 21 Aug 2024 23:38:24 +0200
From: Heiko Stuebner <heiko@...ech.de>
To: Conor Dooley <conor@...nel.org>,
 Cristian Ciocaltea <cristian.ciocaltea@...labora.com>
CC: Andrzej Hajda <andrzej.hajda@...el.com>,
 Neil Armstrong <neil.armstrong@...aro.org>, Robert Foss <rfoss@...nel.org>,
 Laurent Pinchart <Laurent.pinchart@...asonboard.com>,
 Jonas Karlman <jonas@...boo.se>, Jernej Skrabec <jernej.skrabec@...il.com>,
 Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
 Maxime Ripard <mripard@...nel.org>, Thomas Zimmermann <tzimmermann@...e.de>,
 David Airlie <airlied@...il.com>, Daniel Vetter <daniel@...ll.ch>,
 Sandy Huang <hjc@...k-chips.com>, Andy Yan <andy.yan@...k-chips.com>,
 Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
 Conor Dooley <conor+dt@...nel.org>, Mark Yao <markyao0591@...il.com>,
 Sascha Hauer <s.hauer@...gutronix.de>, dri-devel@...ts.freedesktop.org,
 linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
 linux-rockchip@...ts.infradead.org, devicetree@...r.kernel.org,
 kernel@...labora.com, Alexandre ARNOUD <aarnoud@...com>,
 Luis de Arquer <ldearquer@...il.com>
Subject: Re: [PATCH v4 3/4] dt-bindings: display: rockchip: Add schema for RK3588 HDMI TX Controller



Am 21. August 2024 23:28:55 MESZ schrieb Conor Dooley <conor@...nel.org>:
>Cristian, Heiko,
>
>On Wed, Aug 21, 2024 at 11:38:01PM +0300, Cristian Ciocaltea wrote:
>> On 8/21/24 6:07 PM, Conor Dooley wrote:
>> > On Tue, Aug 20, 2024 at 11:12:45PM +0300, Cristian Ciocaltea wrote:
>> >> On 8/20/24 7:14 PM, Conor Dooley wrote:
>> >>> On Tue, Aug 20, 2024 at 03:37:44PM +0300, Cristian Ciocaltea wrote:
>> >>>> On 8/19/24 7:53 PM, Conor Dooley wrote:
>> >>>>> On Mon, Aug 19, 2024 at 01:29:30AM +0300, Cristian Ciocaltea wrote:
>> >>>>>> +  rockchip,grf:
>> >>>>>> +    $ref: /schemas/types.yaml#/definitions/phandle
>> >>>>>> +    description:
>> >>>>>> +      Most HDMI QP related data is accessed through SYS GRF regs.
>> >>>>>> +
>> >>>>>> +  rockchip,vo1-grf:
>> >>>>>> +    $ref: /schemas/types.yaml#/definitions/phandle
>> >>>>>> +    description:
>> >>>>>> +      Additional HDMI QP related data is accessed through VO1 GRF regs.
>> >>>>>
>> >>>>> Why are these required? What prevents you looking up the syscons by
>> >>>>> compatible?
>> >>>>
>> >>>> That is for getting the proper instance:
>> >>>
>> >>> Ah, that makes sense. I am, however, curious why these have the same
>> >>> compatible when they have different sized regions allocated to them.
>> >>
>> >> Good question, didn't notice.  I've just checked the TRM and, in both
>> >> cases, the maximum register offset is within the 0x100 range.  Presumably
>> >> this is nothing but an inconsistency, as the syscons have been added in
>> >> separate commits.
>> > 
>> > Is that TRM publicly available? I do find it curious that devices sound
>> > like they have different contents have the same compatible. In my view,
>> > that is incorrect and they should have unique compatibles if the
>> > contents (and therefore the programming model) differs.
>> 
>> Don't know if there's an official location to get it from, but a quick
>> search on internet shows a few repos providing them, e.g. [1].
>> 
>> Comparing "6.14 VO0_GRF Register Description" at pg. 777 with "6.15 VO1_GRF
>> Register Description" at pg. 786 (from Part1) reveals the layout is mostly
>> similar, with a few variations though.
>
>Page references and everything, thank you very much. I don't think those
>two GRFs should have the same compatibles, they're, as you say, similar
>but not identical. Seems like a bug to me!
>
>Heiko, what do you think?

Yes, while the register names sound similar, looking at the bit definitions this evening revealed that they handle vastly different settings.

So I guess we should fix the compatibles. They are all about graphics stuff and HDMI actually is the first output, so right now WE can at least still claim the no-users joker ;-)


Heiko

>
>> [1] https://github.com/FanX-Tek/rk3588-TRM-and-Datasheet
>> 
>> >>
>> >>>> 	vo0_grf: syscon@...a6000 {
>> >>>> 		compatible = "rockchip,rk3588-vo-grf", "syscon";
>> >>>> 		reg = <0x0 0xfd5a6000 0x0 0x2000>;
>> >>>> 		clocks = <&cru PCLK_VO0GRF>;
>> >>>> 	};
>> >>>>
>> >>>> 	vo1_grf: syscon@...a8000 {
>> >>>> 		compatible = "rockchip,rk3588-vo-grf", "syscon";
>> >>>> 		reg = <0x0 0xfd5a8000 0x0 0x100>;
>> >>>> 		clocks = <&cru PCLK_VO1GRF>;
>> >>>> 	};
>> >

-- 
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