linux-kernel - [PATCH] x86/MCE: Prevent CPU offline for SMCA CPUs with non-core banks

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Message-ID: <20240821140017.330105-1-yazen.ghannam@amd.com>
Date: Wed, 21 Aug 2024 09:00:17 -0500
From: Yazen Ghannam <yazen.ghannam@....com>
To: <linux-edac@...r.kernel.org>
CC: <linux-kernel@...r.kernel.org>, <tony.luck@...el.com>, <x86@...nel.org>,
	<avadhut.naik@....com>, <john.allen@....com>, <boris.ostrovsky@...cle.com>,
	Yazen Ghannam <yazen.ghannam@....com>
Subject: [PATCH] x86/MCE: Prevent CPU offline for SMCA CPUs with non-core banks

Logical CPUs in AMD Scalable MCA (SMCA) systems can manage non-core
banks. Each of these banks represents unique and separate hardware
located within the system. Each bank is managed by a single logical CPU;
they are not shared. Furthermore, the "CPU to MCA bank" assignment
cannot be modified at run time.

The MCE subsystem supports run time CPU hotplug. Many vendors have
non-core MCA banks, so MCA settings are not cleared when a CPU is
offlined for these vendors.

Even though the non-core MCA banks remain enabled, MCA errors will not
be handled (reported, cleared, etc.) on SMCA systems when the managing
CPU is offline.

Check if a CPU manages non-core MCA banks and, if so, prevent it from
being taken offline.

Signed-off-by: Yazen Ghannam <yazen.ghannam@....com>
---
 arch/x86/kernel/cpu/mce/core.c | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c
index 2a938f429c4d..cf1529d0e6b1 100644
--- a/arch/x86/kernel/cpu/mce/core.c
+++ b/arch/x86/kernel/cpu/mce/core.c
@@ -2770,10 +2770,34 @@ static int mce_cpu_online(unsigned int cpu)
 	return 0;
 }
 
+static bool mce_cpu_is_hotpluggable(void)
+{
+	if (!mce_flags.smca)
+		return true;
+
+	/*
+	 * SMCA systems use banks 0-6 for core units. Banks 7 and later are
+	 * used for non-core units.
+	 *
+	 * Logical CPUs with 7 or fewer banks can be offlined, since they are not
+	 * managing any non-core units.
+	 *
+	 * Check if non-core banks are enabled using MCG_CTL. The hardware may
+	 * report MCG_CAP[Count] greater than is actually present, so it is not a
+	 * good indicator that a CPU has non-core banks.
+	 */
+	return fls_long(mce_rdmsrl(MSR_IA32_MCG_CTL)) <= 7;
+}
+
 static int mce_cpu_pre_down(unsigned int cpu)
 {
 	struct timer_list *t = this_cpu_ptr(&mce_timer);
 
+	if (!mce_cpu_is_hotpluggable()) {
+		pr_info("CPU%d is not hotpluggable\n", cpu);
+		return -EOPNOTSUPP;
+	}
+
 	mce_disable_cpu();
 	del_timer_sync(t);
 	mce_threshold_remove_device(cpu);
-- 
2.34.1