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Message-Id: <20240822-eblanc-ad4630_v1-v1-5-5c68f3327fdd@baylibre.com>
Date: Thu, 22 Aug 2024 14:45:21 +0200
From: Esteban Blanc <eblanc@...libre.com>
To: Lars-Peter Clausen <lars@...afoo.de>,
Michael Hennerich <Michael.Hennerich@...log.com>,
Jonathan Cameron <jic23@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Nuno Sa <nuno.sa@...log.com>,
Jonathan Corbet <corbet@....net>
Cc: Michael Hennerich <michael.hennerich@...log.com>,
linux-iio@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, David Lechner <dlechner@...libre.com>,
linux-doc@...r.kernel.org, Esteban Blanc <eblanc@...libre.com>
Subject: [PATCH 5/6] iio: adc: ad4030: add support for ad4632-16 and
ad4632-24
AD4632-24 and AD4632-16 are 2 channels ADCs. Both channels are
interleaved bit per bit on SDO line.
Both of them do not have evaluation board. As such, the support added
here can't be tested. Support is provided as best effort until someone get
their hands on one.
Signed-off-by: Esteban Blanc <eblanc@...libre.com>
---
drivers/iio/adc/ad4030.c | 42 ++++++++++++++++++++++++++++++++++++++++++
1 file changed, 42 insertions(+)
diff --git a/drivers/iio/adc/ad4030.c b/drivers/iio/adc/ad4030.c
index dbba5287b630..d42eb53b5e56 100644
--- a/drivers/iio/adc/ad4030.c
+++ b/drivers/iio/adc/ad4030.c
@@ -34,6 +34,8 @@
#define AD4030_REG_CHIP_GRADE_AD4030_24_GRADE 0x10
#define AD4030_REG_CHIP_GRADE_AD4630_16_GRADE 0x03
#define AD4030_REG_CHIP_GRADE_AD4630_24_GRADE 0x00
+#define AD4030_REG_CHIP_GRADE_AD4632_16_GRADE 0x05
+#define AD4030_REG_CHIP_GRADE_AD4632_24_GRADE 0x02
#define AD4030_REG_CHIP_GRADE_MASK_CHIP_GRADE GENMASK(7, 3)
#define AD4030_REG_SCRATCH_PAD 0x0A
#define AD4030_REG_SPI_REVISION 0x0B
@@ -106,6 +108,8 @@
#define AD4030_TCYC_NS 500
#define AD4030_TCYC_ADJUSTED_NS (AD4030_TCYC_NS - AD4030_TCNVL_NS)
#define AD4030_TRESET_PW_NS 50
+#define AD4632_TCYC_NS 2000
+#define AD4632_TCYC_ADJUSTED_NS (AD4632_TCYC_NS - AD4030_TCNVL_NS)
#define AD4030_TRESET_COM_DELAY_MS 750
enum ad4030_out_mode {
@@ -1068,10 +1072,46 @@ static const struct ad4030_chip_info ad4630_24_chip_info = {
.tcyc = AD4030_TCYC_ADJUSTED_NS,
};
+static const struct ad4030_chip_info ad4632_16_chip_info = {
+ .name = "ad4632-16",
+ .available_masks = ad4630_channel_masks,
+ .available_masks_len = ARRAY_SIZE(ad4630_channel_masks),
+ .channels = {
+ AD4030_CHAN_IN(0, ad4030_16_scan_types),
+ AD4030_CHAN_CMO(0),
+ AD4030_CHAN_IN(1, ad4030_16_scan_types),
+ AD4030_CHAN_CMO(1),
+ IIO_CHAN_SOFT_TIMESTAMP(4),
+ },
+ .grade = AD4030_REG_CHIP_GRADE_AD4632_16_GRADE,
+ .precision_bits = 16,
+ .num_channels = 2,
+ .tcyc = AD4632_TCYC_ADJUSTED_NS,
+};
+
+static const struct ad4030_chip_info ad4632_24_chip_info = {
+ .name = "ad4632-24",
+ .available_masks = ad4630_channel_masks,
+ .available_masks_len = ARRAY_SIZE(ad4630_channel_masks),
+ .channels = {
+ AD4030_CHAN_IN(0, ad4030_24_scan_types),
+ AD4030_CHAN_CMO(0),
+ AD4030_CHAN_IN(1, ad4030_24_scan_types),
+ AD4030_CHAN_CMO(1),
+ IIO_CHAN_SOFT_TIMESTAMP(4),
+ },
+ .grade = AD4030_REG_CHIP_GRADE_AD4632_24_GRADE,
+ .precision_bits = 24,
+ .num_channels = 2,
+ .tcyc = AD4632_TCYC_ADJUSTED_NS,
+};
+
static const struct spi_device_id ad4030_id_table[] = {
{ "ad4030-24", (kernel_ulong_t)&ad4030_24_chip_info },
{ "ad4630-16", (kernel_ulong_t)&ad4630_16_chip_info },
{ "ad4630-24", (kernel_ulong_t)&ad4630_24_chip_info },
+ { "ad4632-16", (kernel_ulong_t)&ad4632_16_chip_info },
+ { "ad4632-24", (kernel_ulong_t)&ad4632_24_chip_info },
{}
};
MODULE_DEVICE_TABLE(spi, ad4030_id_table);
@@ -1080,6 +1120,8 @@ static const struct of_device_id ad4030_of_match[] = {
{ .compatible = "adi,ad4030-24", .data = &ad4030_24_chip_info },
{ .compatible = "adi,ad4630-16", .data = &ad4630_16_chip_info },
{ .compatible = "adi,ad4630-24", .data = &ad4630_24_chip_info },
+ { .compatible = "adi,ad4632-16", .data = &ad4632_16_chip_info },
+ { .compatible = "adi,ad4632-24", .data = &ad4632_24_chip_info },
{}
};
MODULE_DEVICE_TABLE(of, ad4030_of_match);
--
2.44.1
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