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Message-ID: <545e9e80-5b38-40f5-9a23-ff5112b13917@notapiano>
Date: Thu, 22 Aug 2024 12:06:31 -0400
From: NĂcolas F. R. A. Prado <nfraprado@...labora.com>
To: Rohit Agarwal <rohiagar@...omium.org>
Cc: chunkuang.hu@...nel.org, p.zabel@...gutronix.de, airlied@...il.com,
daniel@...ll.ch, maarten.lankhorst@...ux.intel.com,
mripard@...nel.org, tzimmermann@...e.de, robh@...nel.org,
krzk+dt@...nel.org, conor+dt@...nel.org, matthias.bgg@...il.com,
angelogioacchino.delregno@...labora.com, ck.hu@...iatek.com,
jitao.shi@...iatek.com, dri-devel@...ts.freedesktop.org,
linux-mediatek@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v3 3/3] arm64: dts: mediatek: mt8186: Add svs node
On Thu, Aug 22, 2024 at 06:46:50AM +0000, Rohit Agarwal wrote:
> Add clock/irq/efuse setting in svs nodes for mt8186 SoC.
>
> Signed-off-by: Rohit Agarwal <rohiagar@...omium.org>
> ---
> arch/arm64/boot/dts/mediatek/mt8186.dtsi | 20 ++++++++++++++++++++
> 1 file changed, 20 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
> index e27c69ec8bdd..a51f3d8ce745 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
> @@ -1361,6 +1361,18 @@ spi0: spi@...0a000 {
> status = "disabled";
> };
>
> + svs: svs@...0b000 {
There's already another node at address 1100b000:
lvts: thermal-sensor@...0b000
You should set the starting address of the SVS to 1100bc00 and decrease the
iospace for lvts to avoid intersection. See this commit for a similar change on
mt8195:
https://lore.kernel.org/all/20231121125044.78642-21-angelogioacchino.delregno@collabora.com/
Thanks,
NĂcolas
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