linux-kernel - Re: [PATCH v4 0/7] riscv: sophgo: Add pinctrl support for CV1800 series SoC

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Message-ID: <CACRpkdbaDW2=R881G9C=r1iW4YNdYpRZ2kHaN63T7EX1A0xVrA@mail.gmail.com>
Date: Fri, 23 Aug 2024 17:44:17 +0200
From: Linus Walleij <linus.walleij@...aro.org>
To: Inochi Amaoto <inochiama@...look.com>
Cc: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, 
	Conor Dooley <conor+dt@...nel.org>, Chen Wang <unicorn_wang@...look.com>, 
	Paul Walmsley <paul.walmsley@...ive.com>, Palmer Dabbelt <palmer@...belt.com>, 
	Albert Ou <aou@...s.berkeley.edu>, Jisheng Zhang <jszhang@...nel.org>, Guo Ren <guoren@...nel.org>, 
	Drew Fustini <dfustini@...libre.com>, Haylen Chu <heylenay@...look.com>, linux-gpio@...r.kernel.org, 
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, 
	linux-riscv@...ts.infradead.org
Subject: Re: [PATCH v4 0/7] riscv: sophgo: Add pinctrl support for CV1800
 series SoC

On Fri, Aug 2, 2024 at 2:34 AM Inochi Amaoto <inochiama@...look.com> wrote:

> Add basic pinctrl driver for Sophgo CV1800 series SoCs.
> This patch series aims to replace the previous patch from Jisheng [1].
> Since the pinctrl of cv1800 has nested mux and its pin definination
> is discrete, it is not suitable to use "pinctrl-single" to cover the
> pinctrl device.
>
> This patch require another patch [2] that provides standard attribute
> "input-schmitt-microvolt"
>
> Note: As current documentation is not enough to guess the pin
> configuration of Huashan Pi, only the pinctrl node is added.
>
> [1] https://lore.kernel.org/linux-riscv/20231113005702.2467-1-jszhang@kernel.org/
> [2] https://lore.kernel.org/all/IA1PR20MB495346246245074234D337A6BBAC2@IA1PR20MB4953.namprd20.prod.outlook.com/
>
> Changed from v3:
> 1. binding: drop unnecessary type
> 2. binding: use right ref for pin node.
> 3. binding: remove mixed spaces and tabs.

This v4 looks good to me and has necessary ACKs.

It contains device tree patches which I am icky to merge but
I can merge the rest and give you an immutable branch in the
pinctrl tree that the ARM SoC maintainers can pull in to
merge the device trees, does this work for you?

Yours,
Linus Walleij