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Message-ID: <20240823181927.7a003c36@xps-13>
Date: Fri, 23 Aug 2024 18:19:27 +0200
From: Miquel Raynal <miquel.raynal@...tlin.com>
To: Frank Li <Frank.Li@....com>
Cc: Alexandre Belloni <alexandre.belloni@...tlin.com>, Boris Brezillon
 <boris.brezillon@...labora.com>, Parshuram Thombare <pthombar@...ence.com>,
 Greg Kroah-Hartman <gregkh@...uxfoundation.org>, Boris Brezillon
 <bbrezillon@...nel.org>, Arnd Bergmann <arnd@...db.de>, Conor Culhane
 <conor.culhane@...vaco.com>, linux-i3c@...ts.infradead.org,
 linux-kernel@...r.kernel.org, imx@...ts.linux.dev
Subject: Re: [PATCH v3 09/11] i3c: master: svc: use spinlock_saveirq at
 svc_i3c_master_ibi_work()

Hi Frank,

Frank.Li@....com wrote on Mon, 19 Aug 2024 12:02:03 -0400:

> According to I3C spec ver 1.1, 09-Jun-2021, section 5.1.2.5:
> 
> The I3C Controller shall hold SCL Low while the Bus is in I3C/I2C Transfer,

				    low				    transfer

> ACK/NACK Phase. But maximum stall time is 100us. We have to disable irq and

and/or (I'm not sure)				the IRQs

> schedule during whole I3C transaction, otherwise, I3C bus timeout will

prevnet scheduling during the whole 		the      may
timeout.

> happen if any irq or schedule happen during transaction.
> 
> Replace mutex with spinlock_saveirq() to make sure finish whole i3c

			wrong name	to avoid stalling SCL...

> transaction without stall SCL more than 100us.
> 
> Signed-off-by: Frank Li <Frank.Li@....com>

Yes, 100us is low, and that's why I initially did my best to enforce
auto ack/nack. We cannot make sure this limit will not be crossed, and
when it's the case, we need to handle the consequences.

> ---
>  drivers/i3c/master/svc-i3c-master.c | 14 +++++++++++---
>  1 file changed, 11 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/i3c/master/svc-i3c-master.c b/drivers/i3c/master/svc-i3c-master.c
> index 161ccd824443b..fbb6cef405577 100644
> --- a/drivers/i3c/master/svc-i3c-master.c
> +++ b/drivers/i3c/master/svc-i3c-master.c
> @@ -432,7 +432,16 @@ static void svc_i3c_master_ibi_work(struct work_struct *work)
>  	u32 status, val;
>  	int ret;
>  
> -	mutex_lock(&master->lock);

Don't you still need this lock for other concurrency reasons?

> +	/*
> +	 * According to I3C spec ver 1.1, 09-Jun-2021, section 5.1.2.5:
> +	 *
> +	 * The I3C Controller shall hold SCL Low while the Bus is in I3C/I2C Transfer, ACK/NACK
> +	 * Phase. But maximum stall time is 100us. We have to disable irq and schedule during whole
> +	 * I3C transaction, otherwise, I3C bus timeout will happen if any irq or schedule happen
> +	 * between transaction..
> +	 */
> +	guard(spinlock_irqsave)(&master->xferqueue.lock);
> +
>  	/*
>  	 * IBIWON may be set before SVC_I3C_MCTRL_REQUEST_AUTO_IBI, causing
>  	 * readl_relaxed_poll_timeout() to return immediately. Consequently,
> @@ -452,7 +461,7 @@ static void svc_i3c_master_ibi_work(struct work_struct *work)
>  	       master->regs + SVC_I3C_MCTRL);
>  
>  	/* Wait for IBIWON, should take approximately 100us */
> -	ret = readl_relaxed_poll_timeout(master->regs + SVC_I3C_MSTATUS, val,
> +	ret = readl_relaxed_poll_timeout_atomic(master->regs + SVC_I3C_MSTATUS, val,
>  					 SVC_I3C_MSTATUS_IBIWON(val), 0, 1000);

This means you lock one CPU for 100us doing nothing every time you send
a frame, that's not possible. Actually the delay was already very small
(could have been set to ~10 maybe) but this is not possible.

>  	if (ret) {
>  		dev_err(master->dev, "Timeout when polling for IBIWON\n");
> @@ -525,7 +534,6 @@ static void svc_i3c_master_ibi_work(struct work_struct *work)
>  
>  reenable_ibis:
>  	svc_i3c_master_enable_interrupts(master, SVC_I3C_MINT_SLVSTART);
> -	mutex_unlock(&master->lock);
>  }
>  
>  static irqreturn_t svc_i3c_master_irq_handler(int irq, void *dev_id)
> 


Thanks,
Miquèl

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