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Message-ID: <87y14nf2u2.ffs@tglx>
Date: Fri, 23 Aug 2024 21:37:09 +0200
From: Thomas Gleixner <tglx@...utronix.de>
To: Jiaxun Yang <jiaxun.yang@...goat.com>, Thomas Bogendoerfer
 <tsbogend@...ha.franken.de>, Florian Fainelli
 <florian.fainelli@...adcom.com>, Broadcom internal kernel review list
 <bcm-kernel-feedback-list@...adcom.com>, Huacai Chen
 <chenhuacai@...nel.org>, Serge Semin <fancer.lancer@...il.com>, Paul
 Burton <paulburton@...nel.org>
Cc: linux-mips@...r.kernel.org, linux-kernel@...r.kernel.org, Jiaxun Yang
 <jiaxun.yang@...goat.com>
Subject: Re: [PATCH v3 09/10] irqchip: irq-mips-cpu: Rework software IRQ
 handling flow

On Sat, Aug 10 2024 at 13:39, Jiaxun Yang wrote:

Please fix the subsystem prefix.

> Remove unnecessary irq_chip hooks for software interrupts,
> and don't mask them in ack hook to match kernel's expectation
> on handling flow.

What's that expectation? You fail to explain why the current code is not
matching them.

> Create a irq_chip for regular (non-MT) mode software interrupts
> so they will be acked as well.

I'm failing to understand what this is about due to the lack of
information above.

> -static struct irq_chip mips_cpu_irq_controller = {
> +static unsigned int mips_sw_irq_startup(struct irq_data *d)
> +{
> +	clear_c0_cause(C_SW0 << d->hwirq);
> +	back_to_back_c0_hazard();
> +	unmask_mips_irq(d);
> +	return 0;
> +}
> +
> +static void mips_sw_irq_ack(struct irq_data *d)
> +{
> +	clear_c0_cause(C_SW0 << d->hwirq);
> +	back_to_back_c0_hazard();
> +}

Please move these functions to the place which actually requires them,
i.e. after the cpu controller struct and before the new one.

> +
> +static const struct irq_chip mips_cpu_irq_controller = {
>  	.name		= "MIPS",
>  	.irq_ack	= mask_mips_irq,
>  	.irq_mask	= mask_mips_irq,
> @@ -60,11 +74,19 @@ static struct irq_chip mips_cpu_irq_controller = {
>  	.irq_enable	= unmask_mips_irq,
>  };
>  
> +static const struct irq_chip mips_cpu_sw_irq_controller = {
> +	.name		= "MIPS",
> +	.irq_startup	= mips_sw_irq_startup,
> +	.irq_ack	= mips_sw_irq_ack,
> +	.irq_mask	= mask_mips_irq,
> +	.irq_unmask	= unmask_mips_irq,
> +};

  
>  asmlinkage void __weak plat_irq_dispatch(void)
>  {
> @@ -152,11 +170,14 @@ asmlinkage void __weak plat_irq_dispatch(void)
>  static int mips_cpu_intc_map(struct irq_domain *d, unsigned int irq,
>  			     irq_hw_number_t hw)
>  {
> -	struct irq_chip *chip;
> +	const struct irq_chip *chip;
>  
> -	if (hw < 2 && cpu_has_mipsmt) {
> -		/* Software interrupts are used for MT/CMT IPI */
> -		chip = &mips_mt_cpu_irq_controller;
> +	if (hw < 2) {
> +		chip = &mips_cpu_sw_irq_controller;
> +#ifdef CONFIG_MIPS_MT
> +		if (cpu_has_mipsmt)
> +			chip = &mips_mt_cpu_irq_controller;
> +#endif

Please move this into a helper function:

#ifdef CONFIG_MIPS_MT
static inline const struct irq_chip *mips_get_cpu_irqchip(void)
{
        return cpu_has_mipsmt ? &mips_mt_cpu_sw_irq_controller : &mips_cpu_sw_irq_controller;
}
#else
#define 
static inline const struct irq_chip *mips_get_cpu_irqchip(void)
{
        return &mips_cpu_sw_irq_controller;
}
#endif

Hmm?

Thanks,

        tglx

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