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Message-ID: <80132627-5585-456b-a8b3-788d83808d3b@kernel.org>
Date: Thu, 22 Aug 2024 23:29:33 -0500
From: Mario Limonciello <superm1@...nel.org>
To: Bjorn Helgaas <bhelgaas@...gle.com>,
Mathias Nyman <mathias.nyman@...el.com>,
Mika Westerberg <mika.westerberg@...ux.intel.com>
Cc: "open list : PCI SUBSYSTEM" <linux-pci@...r.kernel.org>,
open list <linux-kernel@...r.kernel.org>,
"open list : USB XHCI DRIVER" <linux-usb@...r.kernel.org>,
Daniel Drake <drake@...lessos.org>, Gary Li <Gary.Li@....com>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>,
Mario Limonciello <mario.limonciello@....com>
Subject: Re: [PATCH] x86/tsc: Use rdtsc_ordered() when RDTSCP or LFENCE_RDTSC
are supported
On 8/22/24 23:25, Mario Limonciello wrote:
> From: Mario Limonciello <mario.limonciello@....com>
>
> On AMD processors the TSC has been reported drifting on and off for
> various platforms. This has been root caused to becaused by out of order
> TSC and HPET counter values. When the SoC supports RDTSCP or LFENCE_RDTSC
> use ordered tsc reads instead.
>
> Signed-off-by: Mario Limonciello <mario.limonciello@....com>
> ---
> arch/x86/include/asm/tsc.h | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/arch/x86/include/asm/tsc.h b/arch/x86/include/asm/tsc.h
> index 94408a784c8e7..1c0cda1702bec 100644
> --- a/arch/x86/include/asm/tsc.h
> +++ b/arch/x86/include/asm/tsc.h
> @@ -24,6 +24,9 @@ static inline cycles_t get_cycles(void)
> if (!IS_ENABLED(CONFIG_X86_TSC) &&
> !cpu_feature_enabled(X86_FEATURE_TSC))
> return 0;
> + if (cpu_feature_enabled(X86_FEATURE_LFENCE_RDTSC) ||
> + cpu_feature_enabled(X86_FEATURE_RDTSCP))
> + return rdtsc_ordered();
> return rdtsc();
> }
> #define get_cycles get_cycles
Sorry; this unrelated patch I didn't intend to include in the series, it
was in my working directory by accident. Please disregard it for now,
but review the rest of the series.
Thanks!
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