linux-kernel - RE: [PATCH 07/16] reset: rzg2l-usbphy-ctrl: Get reset control array

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Message-ID:
 <TY3PR01MB11346900BCCEB55580C2F912086882@TY3PR01MB11346.jpnprd01.prod.outlook.com>
Date: Fri, 23 Aug 2024 07:25:59 +0000
From: Biju Das <biju.das.jz@...renesas.com>
To: Claudiu.Beznea <claudiu.beznea@...on.dev>, "vkoul@...nel.org"
	<vkoul@...nel.org>, "kishon@...nel.org" <kishon@...nel.org>,
	"robh@...nel.org" <robh@...nel.org>, "krzk+dt@...nel.org"
	<krzk+dt@...nel.org>, "conor+dt@...nel.org" <conor+dt@...nel.org>,
	"p.zabel@...gutronix.de" <p.zabel@...gutronix.de>, "geert+renesas@...der.be"
	<geert+renesas@...der.be>, "magnus.damm@...il.com" <magnus.damm@...il.com>,
	"gregkh@...uxfoundation.org" <gregkh@...uxfoundation.org>,
	"mturquette@...libre.com" <mturquette@...libre.com>, "sboyd@...nel.org"
	<sboyd@...nel.org>, Yoshihiro Shimoda <yoshihiro.shimoda.uh@...esas.com>,
	"ulf.hansson@...aro.org" <ulf.hansson@...aro.org>
CC: "linux-phy@...ts.infradead.org" <linux-phy@...ts.infradead.org>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-renesas-soc@...r.kernel.org" <linux-renesas-soc@...r.kernel.org>,
	"linux-usb@...r.kernel.org" <linux-usb@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org"
	<linux-arm-kernel@...ts.infradead.org>, "linux-clk@...r.kernel.org"
	<linux-clk@...r.kernel.org>, "linux-pm@...r.kernel.org"
	<linux-pm@...r.kernel.org>, Claudiu.Beznea <claudiu.beznea@...on.dev>,
	Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
Subject: RE: [PATCH 07/16] reset: rzg2l-usbphy-ctrl: Get reset control array

Hi Claudiu,

> -----Original Message-----
> From: Claudiu <claudiu.beznea@...on.dev>
> Sent: Thursday, August 22, 2024 4:28 PM
> Subject: [PATCH 07/16] reset: rzg2l-usbphy-ctrl: Get reset control array
> 
> From: Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
> 
> Before accessing the USB area of the RZ/G3S SoC the PWRRDY bit of the SYS_USB_PWRRDY register need to
> be cleared. When USB area is not used the PWRRDY bit of the SYS_USB_PWRRDY register need to be set.
> This register is in the SYSC controller address space and the assert/de-assert of the signal handled
> by SYSC_USB_PWRRDY was implemented as a reset signal.
> 
> The USB modules available on the RZ/G3S SoC that need this bit set are:
> - USB ch0 (supporting host and peripheral mode)
> - USB ch2 (supporting host mode)
> - USBPHY control
> 
> As the USBPHY control is the root device for all the other USB channels (USB ch0, USB ch1) add support
> to set the PWRRDY for the USB area when initializing the USBPHY control. As this is done though reset
> signals get the reset array in the USBPHY control driver.
> 

Comment applicable, if the USB PWRRDY signal is modelled as reset signal.

There is no user for this patch. The first user is RZ/G3S and is there is no support yet.
I think you should merge this patch with next one so that there is a user(RZ/G3S)
for this patch.

Cheers,
Biju

> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
> ---
>  drivers/reset/reset-rzg2l-usbphy-ctrl.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/reset/reset-rzg2l-usbphy-ctrl.c b/drivers/reset/reset-rzg2l-usbphy-ctrl.c
> index 1cd157f4f03b..8b64c12f3bec 100644
> --- a/drivers/reset/reset-rzg2l-usbphy-ctrl.c
> +++ b/drivers/reset/reset-rzg2l-usbphy-ctrl.c
> @@ -132,7 +132,7 @@ static int rzg2l_usbphy_ctrl_probe(struct platform_device *pdev)
>  	if (IS_ERR(regmap))
>  		return PTR_ERR(regmap);
> 
> -	priv->rstc = devm_reset_control_get_exclusive(&pdev->dev, NULL);
> +	priv->rstc = devm_reset_control_array_get_exclusive(&pdev->dev);
>  	if (IS_ERR(priv->rstc))
>  		return dev_err_probe(dev, PTR_ERR(priv->rstc),
>  				     "failed to get reset\n");
> --
> 2.39.2