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Message-ID: <20240824175246.jb6pis4vbx7n2wdp@easter>
Date: Sat, 24 Aug 2024 12:52:46 -0500
From: Nishanth Menon <nm@...com>
To: Manorit Chawdhry <m-chawdhry@...com>
CC: Vignesh Raghavendra <vigneshr@...com>, Tero Kristo <kristo@...nel.org>,
        Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley <conor+dt@...nel.org>,
        <linux-arm-kernel@...ts.infradead.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>,
        Neha Malcom
 Francis <n-francis@...com>,
        Aniket Limaye <a-limaye@...com>, Udit Kumar
	<u-kumar1@...com>,
        Beleswar Padhi <b-padhi@...com>,
        Siddharth Vadapalli
	<s-vadapalli@...com>, Andrew Davis <afd@...com>
Subject: Re: [PATCH v4 2/5] arm64: dts: ti: k3-j784s4*: Remove bootph
 properties from parent nodes

On 13:17-20240814, Manorit Chawdhry wrote:
> Removes bootph-* properties from parent nodes and adds bootph for other
> bootloader nodes.

Why? What is the rationale for the change please?

> 
> Also moves bootph from mcu_timer1 to mcu_timer0 as that is the one that
> is used in bootloader.

Multiple patches please - the above sounds like a specific bug fix.

> 
> Signed-off-by: Manorit Chawdhry <m-chawdhry@...com>
> ---
>  arch/arm64/boot/dts/ti/k3-j784s4-evm.dts         | 10 +---------
>  arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 10 ++++++----
>  2 files changed, 7 insertions(+), 13 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
> index ffa38f41679d..08f4791a3ee8 100644
> --- a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
> @@ -334,7 +334,6 @@ &wkup_gpio0 {
>  };
>  
>  &main_pmx0 {
> -	bootph-all;
>  	main_cpsw2g_default_pins: main-cpsw2g-default-pins {
>  		pinctrl-single,pins = <
>  			J784S4_IOPAD(0x0b8, PIN_INPUT, 6) /* (AC34) MCASP1_ACLKX.RGMII1_RD0 */
> @@ -461,7 +460,6 @@ J784S4_IOPAD(0x078, PIN_OUTPUT, 1) /* (AH37) MCAN2_RX.AUDIO_EXT_REFCLK1 */
>  };
>  
>  &wkup_pmx2 {
> -	bootph-all;
>  	wkup_uart0_pins_default: wkup-uart0-default-pins {
>  		bootph-all;
>  		pinctrl-single,pins = <
> @@ -577,7 +575,6 @@ J784S4_WKUP_IOPAD(0x028, PIN_INPUT, 7)
>  };
>  
>  &wkup_pmx0 {
> -	bootph-all;
>  	mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins {
>  		bootph-all;
>  		pinctrl-single,pins = <
> @@ -597,7 +594,6 @@ J784S4_WKUP_IOPAD(0x008, PIN_INPUT, 0) /* (C34) MCU_OSPI0_DQS */
>  };
>  
>  &wkup_pmx1 {
> -	bootph-all;
>  	mcu_fss0_ospi0_1_pins_default: mcu-fss0-ospi0-1-default-pins {
>  		bootph-all;
>  		pinctrl-single,pins = <
> @@ -668,6 +664,7 @@ bucka12: buck12 {
>  				regulator-max-microvolt = <1100000>;
>  				regulator-boot-on;
>  				regulator-always-on;
> +				bootph-pre-ram;
>  			};
>  
>  			bucka3: buck3 {
> @@ -769,18 +766,15 @@ &ufs_wrapper {
>  };
>  
>  &fss {
> -	bootph-all;
>  	status = "okay";
>  };
>  
>  &ospi0 {
> -	bootph-all;
>  	status = "okay";
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&mcu_fss0_ospi0_pins_default>, <&mcu_fss0_ospi0_1_pins_default>;
>  
>  	flash@0 {
> -		bootph-all;
>  		compatible = "jedec,spi-nor";
>  		reg = <0x0>;
>  		spi-tx-bus-width = <8>;
> @@ -837,13 +831,11 @@ partition@...0000 {
>  };
>  
>  &ospi1 {
> -	bootph-all;
>  	status = "okay";
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&mcu_fss0_ospi1_pins_default>;
>  
>  	flash@0 {
> -		bootph-all;
>  		compatible = "jedec,spi-nor";
>  		reg = <0x0>;
>  		spi-tx-bus-width = <1>;
> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
> index f3a6ed1c979d..6409e702ffd4 100644
> --- a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
> @@ -7,7 +7,6 @@
>  
>  &cbass_mcu_wakeup {
>  	sms: system-controller@...83000 {
> -		bootph-all;
>  		compatible = "ti,k2g-sci";
>  		ti,host-id = <12>;
>  
> @@ -39,7 +38,6 @@ k3_reset: reset-controller {
>  	};
>  
>  	wkup_conf: bus@...00000 {
> -		bootph-all;
>  		compatible = "simple-bus";
>  		#address-cells = <1>;
>  		#size-cells = <1>;
> @@ -59,6 +57,8 @@ secure_proxy_sa3: mailbox@...00000 {
>  		reg = <0x00 0x43600000 0x00 0x10000>,
>  		      <0x00 0x44880000 0x00 0x20000>,
>  		      <0x00 0x44860000 0x00 0x20000>;
> +		bootph-pre-ram;
> +
>  		/*
>  		 * Marked Disabled:
>  		 * Node is incomplete as it is meant for bootloaders and
> @@ -172,13 +172,13 @@ mcu_timer0: timer@...00000 {
>  		assigned-clocks = <&k3_clks 35 2>;
>  		assigned-clock-parents = <&k3_clks 35 3>;
>  		power-domains = <&k3_pds 35 TI_SCI_PD_EXCLUSIVE>;
> +		bootph-all;
>  		ti,timer-pwm;
>  		/* Non-MPU Firmware usage */
>  		status = "reserved";
>  	};
>  
>  	mcu_timer1: timer@...10000 {
> -		bootph-all;
>  		compatible = "ti,am654-timer";
>  		reg = <0x00 0x40410000 0x00 0x400>;
>  		interrupts = <GIC_SPI 817 IRQ_TYPE_LEVEL_HIGH>;
> @@ -458,7 +458,6 @@ mcu_spi2: spi@...20000 {
>  	};
>  
>  	mcu_navss: bus@...80000 {
> -		bootph-all;
>  		compatible = "simple-bus";
>  		#address-cells = <2>;
>  		#size-cells = <2>;
> @@ -515,6 +514,8 @@ secure_proxy_mcu: mailbox@...80000 {
>  		reg = <0x00 0x2a480000 0x00 0x80000>,
>  		      <0x00 0x2a380000 0x00 0x80000>,
>  		      <0x00 0x2a400000 0x00 0x80000>;
> +		bootph-pre-ram;
> +
>  		/*
>  		 * Marked Disabled:
>  		 * Node is incomplete as it is meant for bootloaders and
> @@ -632,6 +633,7 @@ wkup_vtm0: temperature-sensor@...40000 {
>  		      <0x00 0x42050000 0x00 0x350>;
>  		power-domains = <&k3_pds 243 TI_SCI_PD_SHARED>;
>  		#thermal-sensor-cells = <1>;
> +		bootph-pre-ram;
>  	};
>  
>  	tscadc0: tscadc@...00000 {
> 
> -- 
> 2.46.0
> 

-- 
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3  1A34 DDB5 849D 1736 249D

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