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Message-ID: <20240826-daycare-freewill-c0e1400bf255@spud>
Date: Mon, 26 Aug 2024 18:09:09 +0100
From: Conor Dooley <conor@...nel.org>
To: claudiu beznea <claudiu.beznea@...on.dev>
Cc: vkoul@...nel.org, kishon@...nel.org, robh@...nel.org,
krzk+dt@...nel.org, conor+dt@...nel.org, p.zabel@...gutronix.de,
geert+renesas@...der.be, magnus.damm@...il.com,
gregkh@...uxfoundation.org, mturquette@...libre.com,
sboyd@...nel.org, yoshihiro.shimoda.uh@...esas.com,
biju.das.jz@...renesas.com, ulf.hansson@...aro.org,
linux-phy@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-renesas-soc@...r.kernel.org,
linux-usb@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-clk@...r.kernel.org, linux-pm@...r.kernel.org,
Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
Subject: Re: [PATCH 02/16] dt-bindings: soc: renesas: renesas,rzg2l-sysc: Add
#reset-cells for RZ/G3S
On Mon, Aug 26, 2024 at 01:15:43PM +0300, claudiu beznea wrote:
>
>
> On 23.08.2024 19:33, Conor Dooley wrote:
> > On Fri, Aug 23, 2024 at 07:26:42PM +0300, claudiu beznea wrote:
> >> On 23.08.2024 19:18, Conor Dooley wrote:
> >>> On Fri, Aug 23, 2024 at 10:54:06AM +0300, claudiu beznea wrote:
> >>>> Hi, Conor,
> >>>>
> >>>> On 22.08.2024 19:42, Conor Dooley wrote:
> >>>>> On Thu, Aug 22, 2024 at 06:27:47PM +0300, Claudiu wrote:
> >>>>>> From: Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
> >>>>>>
> >>>>>> The RZ/G3S System controller has registers to control signals that need
> >>>>>> to be de-asserted/asserted before/after different SoC areas are power
> >>>>>> on/off. This signals are implemented as reset signals. For this document
> >>>>>> the #reset-cells property.
> >>>>>>
> >>>>>> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
> >>>>>> ---
> >>>>>> .../bindings/soc/renesas/renesas,rzg2l-sysc.yaml | 16 ++++++++++++++++
> >>>>>> 1 file changed, 16 insertions(+)
> >>>>>>
> >>>>>> diff --git a/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml b/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml
> >>>>>> index 4386b2c3fa4d..6b0bb34485d9 100644
> >>>>>> --- a/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml
> >>>>>> +++ b/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml
> >>>>>> @@ -42,12 +42,28 @@ properties:
> >>>>>> - const: cm33stbyr_int
> >>>>>> - const: ca55_deny
> >>>>>>
> >>>>>> + "#reset-cells":
> >>>>>> + const: 1
> >>>>>> +
> >>>>>> required:
> >>>>>> - compatible
> >>>>>> - reg
> >>>>>>
> >>>>>> additionalProperties: false
> >>>>>>
> >>>>>> +allOf:
> >>>>>> + - if:
> >>>>>> + properties:
> >>>>>> + compatible:
> >>>>>> + contains:
> >>>>>> + const: renesas,r9a08g045-sysc
> >>>>>> + then:
> >>>>>> + required:
> >>>>>> + - "#reset-cells"
> >>>>>
> >>>>> Given this is new required property on an existing platform, I'd expect
> >>>>> some mention of why it used to be okay to not have this but is now
> >>>>> required. Did firmware or a bootloader stage take things out of reset?
> >>>>
> >>>> On previous SoCs the SYS controller has no support for controlling the
> >>>> signals going to different peripherals (USB, PCIE in case of RZ/G3S).
> >>>> I'll add a note about this on next version.
> >>>
> >>> My initial thought here wasn't about previous SoCs though, it was
> >>> because you didn't add the compatible in this series for /this/ SoC.
> >>
> >> RZ/G3S compatible is already present in this file:
> >> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml#n26
> >
> > I know, first thing I did when I read the original patch was open the
> > file ;)
> > I don't care about the old SoCs, cos you're not applying the property to
> > them, so what's changed between SoCs isn't really relevant. It's a mention
> > of why, on this SoC, it is safe to add new required properties that I want.
>
>
> >
> > AFAIU the answer is that no consumer of the resets existed before, so
>
> That's true.
>
> > there's not some special state there, and I am guessing that the new
> > sysc driver you're adding isn't going to fail to probe if there are no
> > resets,
>
> That's true.
>
> it just won't register a reset controller?
>
> It will register it but,
>
> the new sysc driver is going to probe only for this SoC (RZ/G3S). On RZ/G3S
> we have 2 resets. These well be registered unconditionally, currently, only
> for RZ/G3S. If there will be no DT users for it then it should be no
> problem, AFAICT.
Okay, sounds it doesn't break for existing devicetrees.
Acked-by: Conor Dooley <conor.dooley@...rochip.com>
Thanks,
Conor.
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