linux-kernel - [PATCH v2 6/6] arm64: dts: ti: iot2050: Enforce DMA isolation for devices behind PCI RC

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Message-ID: <695e8ffeca42a765a35ea1e5df61a5ed16ef7180.1724709007.git.jan.kiszka@siemens.com>
Date: Mon, 26 Aug 2024 23:50:07 +0200
From: Jan Kiszka <jan.kiszka@...mens.com>
To: Nishanth Menon <nm@...com>,
	Santosh Shilimkar <ssantosh@...nel.org>,
	Vignesh Raghavendra <vigneshr@...com>,
	Rob Herring <robh+dt@...nel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
	Conor Dooley <conor+dt@...nel.org>
Cc: linux-arm-kernel@...ts.infradead.org,
	linux-kernel@...r.kernel.org,
	devicetree@...r.kernel.org,
	Siddharth Vadapalli <s-vadapalli@...com>,
	Bao Cheng Su <baocheng.su@...mens.com>,
	Hua Qian Li <huaqian.li@...mens.com>,
	Diogo Ivo <diogo.ivo@...mens.com>
Subject: [PATCH v2 6/6] arm64: dts: ti: iot2050: Enforce DMA isolation for devices behind PCI RC

From: Jan Kiszka <jan.kiszka@...mens.com>

Reserve a 64M memory region below the top of 1G RAM (smallest RAM size
across the series, space left for firmware carve-outs) and ensure that
all PCI devices do their DMA only inside that region. This is configured
via a restricted-dma-pool and enforced with the help of the first PVU.

Signed-off-by: Jan Kiszka <jan.kiszka@...mens.com>
---
 .../boot/dts/ti/k3-am65-iot2050-common.dtsi   | 32 +++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
index e76828ccf21b..cc0f33e3519c 100644
--- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
@@ -82,6 +82,11 @@ wdt_reset_memory_region: wdt-memory@...00000 {
 			reg = <0x00 0xa2200000 0x00 0x1000>;
 			no-map;
 		};
+
+		pci_restricted_dma_region: restricted-dma@...00000 {
+			compatible = "restricted-dma-pool";
+			reg = <0 0xba000000 0 0x4000000>;
+		};
 	};
 
 	leds {
@@ -571,6 +576,10 @@ seboot-backup@...000 {
 	};
 };
 
+&pcie0_rc {
+	memory-region = <&pci_restricted_dma_region>;
+};
+
 &pcie1_rc {
 	status = "okay";
 	pinctrl-names = "default";
@@ -580,6 +589,8 @@ &pcie1_rc {
 	phys = <&serdes1 PHY_TYPE_PCIE 0>;
 	phy-names = "pcie-phy0";
 	reset-gpios = <&wkup_gpio0 27 GPIO_ACTIVE_HIGH>;
+
+	memory-region = <&pci_restricted_dma_region>;
 };
 
 &mailbox0_cluster0 {
@@ -640,3 +651,24 @@ &mcu_r5fss0 {
 	/* lock-step mode not supported on iot2050 boards */
 	ti,cluster-mode = <0>;
 };
+
+&main_navss {
+	ti_pvu0: ti-pvu@...80000 {
+		compatible = "ti,am654-pvu";
+		reg = <0 0x30f80000 0 0x1000>,
+		      <0 0x36000000 0 0x100000>;
+		reg-names = "cfg", "tlbif";
+		interrupts-extended = <&intr_main_navss 390>;
+		interrupt-names = "pvu";
+	};
+
+	ti_pvu1: ti-pvu@...81000 {
+		compatible = "ti,am654-pvu";
+		reg = <0 0x30f81000 0 0x1000>,
+		      <0 0x36100000 0 0x100000>;
+		reg-names = "cfg", "tlbif";
+		interrupts-extended = <&intr_main_navss 389>;
+		interrupt-names = "pvu";
+		status = "disabled";
+	};
+};
-- 
2.43.0