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Message-ID: <CACRpkdbdXNeL6B43uV-2evCfr6iv8fUsSVtAND+2U0H5mSL2rw@mail.gmail.com>
Date: Mon, 26 Aug 2024 10:59:12 +0200
From: Linus Walleij <linus.walleij@...aro.org>
To: Andrea della Porta <andrea.porta@...e.com>
Cc: Michael Turquette <mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org>,
Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
Florian Fainelli <florian.fainelli@...adcom.com>,
Broadcom internal kernel review list <bcm-kernel-feedback-list@...adcom.com>,
Catalin Marinas <catalin.marinas@....com>, Will Deacon <will@...nel.org>,
Derek Kiernan <derek.kiernan@....com>, Dragan Cvetic <dragan.cvetic@....com>,
Arnd Bergmann <arnd@...db.de>, Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Nicolas Ferre <nicolas.ferre@...rochip.com>, Claudiu Beznea <claudiu.beznea@...on.dev>,
"David S. Miller" <davem@...emloft.net>, Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
Saravana Kannan <saravanak@...gle.com>, Bjorn Helgaas <bhelgaas@...gle.com>, linux-clk@...r.kernel.org,
devicetree@...r.kernel.org, linux-rpi-kernel@...ts.infradead.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-gpio@...r.kernel.org, netdev@...r.kernel.org, linux-pci@...r.kernel.org,
linux-arch@...r.kernel.org, Lee Jones <lee@...nel.org>, Andrew Lunn <andrew@...n.ch>,
Stefan Wahren <wahrenst@....net>
Subject: Re: [PATCH 07/11] pinctrl: rp1: Implement RaspberryPi RP1 gpio support
Hi Andrea,
thanks for your patch!
On Tue, Aug 20, 2024 at 4:36 PM Andrea della Porta
<andrea.porta@...e.com> wrote:
> The RP1 is an MFD supporting a gpio controller and /pinmux/pinctrl.
> Add minimum support for the gpio only portion. The driver is in
> pinctrl folder since upcoming patches will add the pinmux/pinctrl
> support where the gpio part can be seen as an addition.
>
> Signed-off-by: Andrea della Porta <andrea.porta@...e.com>
(...)
> +#include <linux/bitmap.h>
> +#include <linux/bitops.h>
(...)
> +static void rp1_pad_update(struct rp1_pin_info *pin, u32 clr, u32 set)
> +{
> + u32 padctrl = readl(pin->pad);
> +
> + padctrl &= ~clr;
> + padctrl |= set;
> +
> + writel(padctrl, pin->pad);
> +}
Looks a bit like a reimplementation of regmap-mmio? If you want to do
this why not use regmap-mmio?
> +static void rp1_set_dir(struct rp1_pin_info *pin, bool is_input)
> +{
> + int offset = is_input ? RP1_CLR_OFFSET : RP1_SET_OFFSET;
> +
> + writel(1 << pin->offset, pin->rio + RP1_RIO_OE + offset);
If you include bitops.h what about:
writel(BIT(pin->offset), pin->rio + RP1_RIO_OE + offset);
> +static int rp1_get_value(struct rp1_pin_info *pin)
> +{
> + return !!(readl(pin->rio + RP1_RIO_IN) & (1 << pin->offset));
> +}
Also here
> +
> +static void rp1_set_value(struct rp1_pin_info *pin, int value)
> +{
> + /* Assume the pin is already an output */
> + writel(1 << pin->offset,
> + pin->rio + RP1_RIO_OUT + (value ? RP1_SET_OFFSET : RP1_CLR_OFFSET));
> +}
And here
> +static int rp1_gpio_set_config(struct gpio_chip *chip, unsigned int offset,
> + unsigned long config)
> +{
> + struct rp1_pin_info *pin = rp1_get_pin(chip, offset);
> + unsigned long configs[] = { config };
> +
> + return rp1_pinconf_set(pin, offset, configs,
> + ARRAY_SIZE(configs));
> +}
Nice that you implement this!
> +static void rp1_gpio_irq_config(struct rp1_pin_info *pin, bool enable)
> +{
> + writel(1 << pin->offset,
> + pin->inte + (enable ? RP1_SET_OFFSET : RP1_CLR_OFFSET));
BIT()
Yours,
Linus Walleij
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