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Message-ID: <20240826123602.1872-9-hpausten@protonmail.com>
Date: Mon, 26 Aug 2024 12:38:39 +0000
From: Harry Austen <hpausten@...tonmail.com>
To: Michael Turquette <mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org>, Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, Michal Simek <michal.simek@....com>, Greg Kroah-Hartman <gregkh@...uxfoundation.org>
Cc: Shubhrajyoti Datta <shubhrajyoti.datta@....com>, Dave Ertman <david.m.ertman@...el.com>, Ira Weiny <ira.weiny@...el.com>, linux-clk@...r.kernel.org, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, Harry Austen <hpausten@...tonmail.com>, Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Subject: [PATCH v3 8/9] dt-bindings: clock: xilinx: describe whether dynamic reconfig is enabled
Xilinx clocking wizard IP core's dynamic reconfiguration support is
optionally enabled at build time. Add a devicetree boolean property to
describe whether the hardware supports this feature or not.
Signed-off-by: Harry Austen <hpausten@...tonmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
---
.../devicetree/bindings/clock/xlnx,clocking-wizard.yaml | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml b/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml
index 2b9903f05ef34..72dc6c586f7f5 100644
--- a/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml
+++ b/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml
@@ -47,6 +47,12 @@ properties:
items:
- const: monitor
+ xlnx,dynamic-reconfig:
+ $ref: /schemas/types.yaml#/definitions/flag
+ description:
+ Indicate whether the core has been configured with support for dynamic
+ runtime reconfguration of the clocking primitive MMCM/PLL.
+
xlnx,speed-grade:
$ref: /schemas/types.yaml#/definitions/uint32
enum: [1, 2, 3]
@@ -90,6 +96,7 @@ examples:
compatible = "xlnx,clocking-wizard-v6.0";
reg = <0xb0000000 0x10000>;
#clock-cells = <1>;
+ xlnx,dynamic-reconfig;
xlnx,speed-grade = <1>;
xlnx,nr-outputs = <6>;
clock-names = "clk_in1", "s_axi_aclk";
--
2.46.0
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