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Message-Id: <20240827164417.3309560-10-leo.yan@arm.com>
Date: Tue, 27 Aug 2024 17:44:17 +0100
From: Leo Yan <leo.yan@....com>
To: Arnaldo Carvalho de Melo <acme@...nel.org>,
	Will Deacon <will@...nel.org>,
	Mark Rutland <mark.rutland@....com>,
	Suzuki K Poulose <suzuki.poulose@....com>,
	Mike Leach <mike.leach@...aro.org>,
	James Clark <james.clark@...aro.org>,
	John Garry <john.g.garry@...cle.com>,
	Namhyung Kim <namhyung@...nel.org>,
	Ian Rogers <irogers@...gle.com>,
	Adrian Hunter <adrian.hunter@...el.com>,
	"Liang, Kan" <kan.liang@...ux.intel.com>,
	Jonathan Cameron <jonathan.cameron@...wei.com>,
	Yicong Yang <yangyicong@...ilicon.com>,
	linux-arm-kernel@...ts.infradead.org,
	linux-kernel@...r.kernel.org,
	coresight@...ts.linaro.org,
	linux-perf-users@...r.kernel.org
Cc: Leo Yan <leo.yan@....com>
Subject: [PATCH v1 9/9] perf arm-spe: Dump metadata with version 2

This commit dumps metadata with version 2. It uses two string arrays
metadata_hdr_fmts and metadata_per_cpu_fmts as string formats for the
header and per CPU data respectively, and the arm_spe_print_info()
function is enhanced to support dumping metadata with the version 2
format.

After:

  0 0 0x4a8 [0x170]: PERF_RECORD_AUXTRACE_INFO type: 4
  PMU Type           :13
  Version            :2
  Num of CPUs        :8
    CPU #            :0
    MIDR             :0x410fd801
    Bound PMU Type   :-1
    Min Interval     :0
    Load Data Source :0
    CPU #            :1
    MIDR             :0x410fd801
    Bound PMU Type   :-1
    Min Interval     :0
    Load Data Source :0
    CPU #            :2
    MIDR             :0x410fd870
    Bound PMU Type   :13
    Min Interval     :1024
    Load Data Source :1
    CPU #            :3
    MIDR             :0x410fd870
    Bound PMU Type   :13
    Min Interval     :1024
    Load Data Source :1
    CPU #            :4
    MIDR             :0x410fd870
    Bound PMU Type   :13
    Min Interval     :1024
    Load Data Source :1
    CPU #            :5
    MIDR             :0x410fd870
    Bound PMU Type   :13
    Min Interval     :1024
    Load Data Source :1
    CPU #            :6
    MIDR             :0x410fd850
    Bound PMU Type   :14
    Min Interval     :1024
    Load Data Source :1
    CPU #            :7
    MIDR             :0x410fd850
    Bound PMU Type   :14
    Min Interval     :1024
    Load Data Source :1

Signed-off-by: Leo Yan <leo.yan@....com>
---
 tools/perf/util/arm-spe.c | 43 ++++++++++++++++++++++++++++++++++-----
 1 file changed, 38 insertions(+), 5 deletions(-)

diff --git a/tools/perf/util/arm-spe.c b/tools/perf/util/arm-spe.c
index 87cf06db765b..be34d4c4306a 100644
--- a/tools/perf/util/arm-spe.c
+++ b/tools/perf/util/arm-spe.c
@@ -1067,16 +1067,49 @@ static bool arm_spe_evsel_is_auxtrace(struct perf_session *session __maybe_unuse
 	return strstarts(evsel->name, ARM_SPE_PMU_NAME);
 }
 
-static const char * const arm_spe_info_fmts[] = {
-	[ARM_SPE_PMU_TYPE]		= "  PMU Type           %"PRId64"\n",
+static const char * const metadata_hdr_fmts[] = {
+	[ARM_SPE_PMU_TYPE]		= "  PMU Type           :%"PRId64"\n",
+	[ARM_SPE_HEADER_VERSION]	= "  Version            :%"PRId64"\n",
+	[ARM_SPE_CPU_NUM]		= "  Num of CPUs        :%"PRId64"\n",
 };
 
-static void arm_spe_print_info(__u64 *arr)
+static const char * const metadata_per_cpu_fmts[] = {
+	[ARM_SPE_CPU]			= "    CPU #            :%"PRId64"\n",
+	[ARM_SPE_CPU_MIDR]		= "    MIDR             :0x%"PRIx64"\n",
+	[ARM_SPE_CPU_PMU_TYPE]		= "    Bound PMU Type   :%"PRId64"\n",
+	[ARM_SPE_CAP_MIN_IVAL]		= "    Min Interval     :%"PRId64"\n",
+	[ARM_SPE_CAP_LDS]		= "    Load Data Source :%"PRId64"\n",
+};
+
+static void arm_spe_print_info(struct arm_spe *spe, __u64 *arr)
 {
+	unsigned int i, cpu, header_size, cpu_num, per_cpu_size;
+
 	if (!dump_trace)
 		return;
 
-	fprintf(stdout, arm_spe_info_fmts[ARM_SPE_PMU_TYPE], arr[ARM_SPE_PMU_TYPE]);
+	if (spe->metadata_ver == 1) {
+		cpu_num = 0;
+		header_size = ARM_SPE_AUXTRACE_V1_PRIV_MAX;
+		per_cpu_size = 0;
+	} else if (spe->metadata_ver == 2) {
+		cpu_num = arr[ARM_SPE_CPU_NUM];
+		header_size = ARM_SPE_AUXTRACE_V2_PRIV_MAX;
+		per_cpu_size = ARM_SPE_AUXTRACE_V2_PRIV_PER_CPU_MAX;
+	} else {
+		pr_err("Cannot support metadata ver: %ld\n", spe->metadata_ver);
+		return;
+	}
+
+	for (i = 0; i < header_size; i++)
+		fprintf(stdout, metadata_hdr_fmts[i], arr[i]);
+
+	arr += header_size;
+	for (cpu = 0; cpu < cpu_num; cpu++) {
+		for (i = 0; i < per_cpu_size; i++)
+			fprintf(stdout, metadata_per_cpu_fmts[i], arr[i]);
+		arr += per_cpu_size;
+	}
 }
 
 static void arm_spe_set_event_name(struct evlist *evlist, u64 id,
@@ -1383,7 +1416,7 @@ int arm_spe_process_auxtrace_info(union perf_event *event,
 	spe->auxtrace.evsel_is_auxtrace = arm_spe_evsel_is_auxtrace;
 	session->auxtrace = &spe->auxtrace;
 
-	arm_spe_print_info(&auxtrace_info->priv[0]);
+	arm_spe_print_info(spe, &auxtrace_info->priv[0]);
 
 	if (dump_trace)
 		return 0;
-- 
2.34.1


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