linux-kernel - Re: [PATCH] arm64: errata: Enable the AC03_CPU

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Message-ID: <86zfoy2bt9.fsf@scott-ph-mail.amperecomputing.com>
Date: Tue, 27 Aug 2024 09:02:58 -0700
From: D Scott Phillips <scott@...amperecomputing.com>
To: Anshuman Khandual <anshuman.khandual@....com>, Oliver Upton
 <oliver.upton@...ux.dev>
Cc: Catalin Marinas <catalin.marinas@....com>, Will Deacon
 <will@...nel.org>, Jonathan Corbet <corbet@....net>, Mark Rutland
 <mark.rutland@....com>, linux-arm-kernel@...ts.infradead.org,
 linux-doc@...r.kernel.org, Besar Wicaksono <bwicaksono@...dia.com>, Easwar
 Hariharan <eahariha@...ux.microsoft.com>, Rob Herring <robh@...nel.org>,
 Andre Przywara <andre.przywara@....com>, linux-kernel@...r.kernel.org,
 patches@...erecomputing.com, Marc Zyngier <maz@...nel.org>,
 kvmarm@...ts.linux.dev, James Morse <james.morse@....com>, Suzuki K
 Poulose <suzuki.poulose@....com>, Zenghui Yu <yuzenghui@...wei.com>
Subject: Re: [PATCH] arm64: errata: Enable the AC03_CPU_38 workaround for
 ampere1a

Anshuman Khandual <anshuman.khandual@....com> writes:

> On 8/27/24 04:53, Oliver Upton wrote:
>> Hi D Scott,
>> 
>> On Mon, Aug 26, 2024 at 02:59:33PM -0700, D Scott Phillips wrote:
>>> The ampere1a cpu is affected by erratum AC04_CPU_10 which is the same
>>> bug as AC03_CPU38. Add ampere1a to the AC03_CPU_38 workaround midr list.
>>>
>>> Signed-off-by: D Scott Phillips <scott@...amperecomputing.com>
>>> ---
>>>  Documentation/arch/arm64/silicon-errata.rst | 2 ++
>>>  arch/arm64/Kconfig                          | 2 +-
>>>  arch/arm64/include/asm/cputype.h            | 2 ++
>>>  arch/arm64/kernel/cpu_errata.c              | 1 +
>>>  4 files changed, 6 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/Documentation/arch/arm64/silicon-errata.rst b/Documentation/arch/arm64/silicon-errata.rst
>>> index 50327c05be8d1..39c52385f11fb 100644
>>> --- a/Documentation/arch/arm64/silicon-errata.rst
>>> +++ b/Documentation/arch/arm64/silicon-errata.rst
>>> @@ -55,6 +55,8 @@ stable kernels.
>>>  +----------------+-----------------+-----------------+-----------------------------+
>>>  | Ampere         | AmpereOne       | AC03_CPU_38     | AMPERE_ERRATUM_AC03_CPU_38  |
>>>  +----------------+-----------------+-----------------+-----------------------------+
>>> +| Ampere         | AmpereOne AC04  | AC04_CPU_10     | AMPERE_ERRATUM_AC03_CPU_38  |
>>> ++----------------+-----------------+-----------------+-----------------------------+
>> 
>> We tend to stick the marketing term for a part in the second column so
>> it is more recognizable for the user. Is this a placeholder for something
>> different from "ampere1a"?
>
> Agreed, even the MIDR being added here is for AMPERE1A. Probably something
> like 'AmpereOneA' might be more suitable.

"AmpereOne AC04" was given to me by our marketing department, so that
should be the user visible name of the part when they buy/use
it. ampere1a is the name of the core in the SoC and the thing you can
use in gcc's --mtune=, similar to "neoverse-n1" within "Ampere Altra".

>> 
>>> diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c
>>> index f6b6b45073571..748aa536446ae 100644
>>> --- a/arch/arm64/kernel/cpu_errata.c
>>> +++ b/arch/arm64/kernel/cpu_errata.c
>>> @@ -773,6 +773,7 @@ const struct arm64_cpu_capabilities arm64_errata[] = {
>>>  		.desc = "AmpereOne erratum AC03_CPU_38",
>>>  		.capability = ARM64_WORKAROUND_AMPERE_AC03_CPU_38,
>>>  		ERRATA_MIDR_ALL_VERSIONS(MIDR_AMPERE1),
>>> +		ERRATA_MIDR_ALL_VERSIONS(MIDR_AMPERE1A),
>> 
>> This will break the workaround on AC03, since the second macro reassigns
>> ::midr_range.
>> 
>> You'll want to use ERRATA_MIDR_RANGE_LIST() instead w/ an array of
>> affected MIDRs.
>> 
>
> +1
>
> Although ERRATA_MIDR_RANGE_LIST() in turn creates such a list.

Oops, my mistake. I'll fix this.