linux-kernel - [PATCH V2 6/6] arm64: dts: qcom: ipq5018: Enable PCIe

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20240827045757.1101194-7-quic_srichara@quicinc.com>
Date: Tue, 27 Aug 2024 10:27:57 +0530
From: Sricharan R <quic_srichara@...cinc.com>
To: <bhelgaas@...gle.com>, <lpieralisi@...nel.org>, <kw@...ux.com>,
        <manivannan.sadhasivam@...aro.org>, <robh@...nel.org>,
        <krzk+dt@...nel.org>, <conor+dt@...nel.org>, <vkoul@...nel.org>,
        <kishon@...nel.org>, <andersson@...nel.org>, <konradybcio@...nel.org>,
        <p.zabel@...gutronix.de>, <dmitry.baryshkov@...aro.org>,
        <quic_nsekar@...cinc.com>, <linux-arm-msm@...r.kernel.org>,
        <linux-pci@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <linux-phy@...ts.infradead.org>,
        <robimarko@...il.com>, <quic_srichara@...cinc.com>
Subject: [PATCH V2 6/6] arm64: dts: qcom: ipq5018: Enable PCIe

From: Nitheesh Sekar <quic_nsekar@...cinc.com>

Enable the PCIe controller and PHY nodes for RDP 432-c2.

Signed-off-by: Nitheesh Sekar <quic_nsekar@...cinc.com>
Signed-off-by: Sricharan Ramabadhran <quic_srichara@...cinc.com>
---
 [v2] Moved status as last property

 arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts b/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts
index 8460b538eb6a..2b253da7f776 100644
--- a/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts
+++ b/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts
@@ -28,6 +28,15 @@ &blsp1_uart1 {
 	status = "okay";
 };
 
+&pcie1 {
+	perst-gpios = <&tlmm 15 GPIO_ACTIVE_LOW>;
+	status = "okay";
+};
+
+&pcie_x2phy {
+	status = "okay";
+};
+
 &sdhc_1 {
 	pinctrl-0 = <&sdc_default_state>;
 	pinctrl-names = "default";
-- 
2.34.1