lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <20240827014202.GA6354@hu-mdtipton-lv.qualcomm.com>
Date: Mon, 26 Aug 2024 18:42:02 -0700
From: Mike Tipton <quic_mdtipton@...cinc.com>
To: Georgi Djakov <quic_c_gdjako@...cinc.com>
CC: <andersson@...nel.org>, <quic_viveka@...cinc.com>,
        <mturquette@...libre.com>, <sboyd@...nel.org>,
        <linux-arm-msm@...r.kernel.org>, <linux-clk@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] clk: qcom: gdsc: Add a flag to skip setting power
 collapse bits

On Tue, Aug 13, 2024 at 05:00:15AM -0700, Georgi Djakov wrote:
> The sdm845 platforms have a hardware issue that requires keeping
> some of the MMNOC GDSCs in SW collapse mode (which is the power-on
> default). But if some driver tries to use these GDSCs and the mode
> is updated because of runtime pm calls, we may get a board hang.
> Introduce a flag to skip any updates to the power collapse settings
> for the impacted GDSCs to avoid unexpected board hangs.
> 
> Cc: Mike Tipton <quic_mdtipton@...cinc.com>
> Cc: Vivek Aknurwar <quic_viveka@...cinc.com>
> Signed-off-by: Georgi Djakov <quic_c_gdjako@...cinc.com>
> ---
>  drivers/clk/qcom/gcc-sdm845.c | 6 +++---
>  drivers/clk/qcom/gdsc.c       | 3 +++
>  drivers/clk/qcom/gdsc.h       | 1 +
>  3 files changed, 7 insertions(+), 3 deletions(-)
> 

Reviewed-by: Mike Tipton <quic_mdtipton@...cinc.com>

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ