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Message-ID: <9ae8b751-a6df-4775-a207-0d203f7415de@kernel.org>
Date: Tue, 27 Aug 2024 12:10:04 +0200
From: Konrad Dybcio <konradybcio@...nel.org>
To: Qiang Yu <quic_qianyu@...cinc.com>, manivannan.sadhasivam@...aro.org,
 vkoul@...nel.org, kishon@...nel.org, robh@...nel.org, andersson@...nel.org,
 konradybcio@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org,
 mturquette@...libre.com, sboyd@...nel.org, abel.vesa@...aro.org,
 quic_msarkar@...cinc.com, quic_devipriy@...cinc.com
Cc: dmitry.baryshkov@...aro.org, kw@...ux.com, lpieralisi@...nel.org,
 neil.armstrong@...aro.org, linux-arm-msm@...r.kernel.org,
 linux-phy@...ts.infradead.org, linux-kernel@...r.kernel.org,
 linux-pci@...r.kernel.org, devicetree@...r.kernel.org,
 linux-clk@...r.kernel.org, Mike Tipton <quic_mdtipton@...cinc.com>
Subject: Re: [PATCH 6/8] clk: qcom: gcc-x1e80100: Fix halt_check for pipediv2
 clocks

On 27.08.2024 8:36 AM, Qiang Yu wrote:
> The pipediv2_clk's source from the same mux as pipe clock. So they have
> same limitation, which is that the PHY sequence requires to enable these
> local CBCs before the PHY is actually outputting a clock to them. This
> means the clock won't actually turn on when we vote them. Hence, let's
> skip the halt bit check of the pipediv2_clk, otherwise pipediv2_clk may
> stuck at off state during bootup.
> 
> Suggested-by: Mike Tipton <quic_mdtipton@...cinc.com>
> Signed-off-by: Qiang Yu <quic_qianyu@...cinc.com>
> ---


Reviewed-by: Konrad Dybcio <konradybcio@...nel.org>

Konrad

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