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Message-ID: <20240827030320.GYA208832.dlan.gentoo>
Date: Tue, 27 Aug 2024 03:03:20 +0000
From: Yixun Lan <dlan@...too.org>
To: Inochi Amaoto <inochiama@...look.com>
Cc: Linus Walleij <linus.walleij@...aro.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>, Conor Dooley <conor@...nel.org>,
Yangyu Chen <cyy@...self.name>, Jesse Taube <jesse@...osinc.com>,
Jisheng Zhang <jszhang@...nel.org>, Icenowy Zheng <uwu@...nowy.me>,
Meng Zhang <zhangmeng.kevin@...cemit.com>,
Meng Zhang <kevin.z.m@...mail.com>, devicetree@...r.kernel.org,
linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-gpio@...r.kernel.org
Subject: Re: [PATCH v2 3/4] riscv: dts: spacemit: add pinctrl support for K1
SoC
Hi Inochi:
On 15:55 Mon 26 Aug , Inochi Amaoto wrote:
> On Sun, Aug 25, 2024 at 01:10:04PM GMT, Yixun Lan wrote:
> > Add pinctrl device tree data to SpacemiT's K1 SoC.
> >
> > Signed-off-by: Yixun Lan <dlan@...too.org>
> > ---
> > Note, only minimal device tree data added in this series,
> > which just try to demonstrate this pinctrl driver, but
> > more dt data can be added later, in separate patches.
> > ---
> > arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi | 19 +++++++++++++++++++
> > arch/riscv/boot/dts/spacemit/k1.dtsi | 5 +++++
> > 2 files changed, 24 insertions(+)
> >
> > diff --git a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
> > new file mode 100644
> > index 0000000000000..38ccaad1209f5
> > --- /dev/null
> > +++ b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
> > @@ -0,0 +1,19 @@
> > +// SPDX-License-Identifier: GPL-2.0 OR MIT
> > +/*
> > + * Copyright (c) 2024 Yixun Lan <dlan@...too.org>
> > + */
> > +
> > +#include <dt-bindings/gpio/gpio.h>
> > +#include <dt-bindings/pinctrl/spacemit,k1-pinctrl.h>
> > +
>
>
> > +&pinctrl {
> > + uart0_2_cfg: uart0-2-cfg {
> > + uart0-2-pins {
> > + pinmux = <K1_PADCONF(GPIO_68, 2)>,
> > + <K1_PADCONF(GPIO_69, 2)>;
> > +
> > + bias-pull-up;
> > + drive-strength-microamp = <32>;
> > + };
> > + };
> > +};
>
> No common file is needed at least for now. You can put it
> in the board dts. Also, squash this into the next patch as
> it is more related to the uart.
>
given that there are many K1 SoC boards on the market, having
a separated pinctrl dts file makes more sense, this will maximize
data sharing.
the problem here that I haven't populated too many pinctrl
cfgs in this file, so it looks quite slim.. but the plan was to
put all pinctrl meta data here even if not used by particular board.
so, I would like to keep current struture unless I'm wrong here.
--
Yixun Lan (dlan)
Gentoo Linux Developer
GPG Key ID AABEFD55
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