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Message-ID: <CA+Y6NJEm8UH5H1zE1Kgz9sKcv2xKKUzR5n=xNdOqyBYocyyCgg@mail.gmail.com>
Date: Wed, 28 Aug 2024 17:05:27 -0400
From: Esther Shimanovich <eshimanovich@...omium.org>
To: Bjorn Helgaas <helgaas@...nel.org>
Cc: Mika Westerberg <mika.westerberg@...ux.intel.com>, Bjorn Helgaas <bhelgaas@...gle.com>,
Rajat Jain <rajatja@...gle.com>, "Rafael J. Wysocki" <rafael.j.wysocki@...el.com>,
Mario Limonciello <mario.limonciello@....com>,
Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>,
iommu@...ts.linux.dev, Lukas Wunner <lukas@...ner.de>, linux-pci@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4] PCI: Detect and trust built-in Thunderbolt chips
On Sat, Aug 24, 2024 at 12:20 PM Bjorn Helgaas <helgaas@...nel.org> wrote:
>
> On Sat, Aug 24, 2024 at 07:26:35AM +0300, Mika Westerberg wrote:
> > On Fri, Aug 23, 2024 at 04:12:54PM -0500, Bjorn Helgaas wrote:
> > > On Fri, Aug 23, 2024 at 04:53:16PM +0000, Esther Shimanovich wrote:
> > > > Some computers with CPUs that lack Thunderbolt features use discrete
> > > > Thunderbolt chips to add Thunderbolt functionality. These Thunderbolt
> > > > chips are located within the chassis; between the root port labeled
> > > > ExternalFacingPort and the USB-C port.
> > >
> > > Is this a firmware defect? I asked this before, and I interpret your
> > > answer of "ExternalFacingPort is not 100% accurate all of the time" as
> > > "yes, this is a firmware defect." That should be part of the commit
> > > log and code comments.
> > >
I like how Lukas explained it here:
https://lore.kernel.org/all/ZstGP0EgttNAxjp2@wunner.de/
It's a bit unclear whether this is firmware implemented incorrectly or
the spec not being specific enough.
Being that I see this interpretation of the spec on all devices with
discrete Thunderbolt chips (across different manufacturers)--that
makes me think that this is an ambiguity on the spec's part.
Given that, how do you suggest I modify the commit log and code comments?
> > > > 2) If a root port does not have integrated Thunderbolt capabilities, but
> > > > has the ExternalFacingPort ACPI property, that means the manufacturer
> > > > has opted to use a discrete Thunderbolt host controller that is
> > > > built into the computer.
> > >
> > > Unconvincing. If a Root Port has an external connector, is it
> > > impossible to plug in a Thunderbolt device to that connector? I
> > > assume the wires from a Root Port could be traces on a PCB to a
> > > soldered-down Thunderbolt controller, OR could be wires to a connector
> > > where a Thunderbolt controller could be plugged in. How could we tell
> > > the difference?
> >
We may assume this both because of how the spec is worded, and how
I've seen it implemented in the case of a discrete Thunderbolt
controller, across all cases.
https://learn.microsoft.com/en-us/windows-hardware/drivers/pci/dsd-for-pcie-root-ports#mapping-native-protocols-pcie-displayport-tunneled-through-usb4-to-usb4-host-routers
"ExternalFacingPort" is only used when there is an externally exposed
PCIe hierarchy. (Never otherwise)
I don't know any other examples of externally exposed PCIe hierarchies
other than Thunderbolt.
Therefore I assume, that if there is "ExternalFacingPort", that means
the device has Thunderbolt capabilities.
If we have confirmed that the device has no integrated thunderbolt
capabilities, that means the device MUST expect a discrete thunderbolt
chip outside of its ExternalFacing root port.
That is my understanding of this. Also let me know how I can reword
here as well.
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