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Message-ID: <955c0fdc-5b04-42d6-a15d-58966c7145c4@quicinc.com>
Date: Wed, 28 Aug 2024 15:42:34 +0800
From: Lijuan Gao <quic_lijuang@...cinc.com>
To: Krzysztof Kozlowski <krzk@...nel.org>
CC: Thomas Gleixner <tglx@...utronix.de>, Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio
	<konradybcio@...nel.org>, <kernel@...cinc.com>,
        <linux-arm-msm@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <devicetree@...r.kernel.org>
Subject: Re: [PATCH 5/6] arm64: dts: qcom: add initial support for QCS615 DTSI



在 8/28/2024 2:23 PM, Krzysztof Kozlowski 写道:
> On Wed, Aug 28, 2024 at 10:02:15AM +0800, Lijuan Gao wrote:
>> Add initial DTSI for QCS615 SoC. It includes base description
>> of CPUs, interrupt-controller and cpu idle on Qualcomm QCS615
>> platform.
>>
>> Signed-off-by: Lijuan Gao <quic_lijuang@...cinc.com>
>> ---
>>   arch/arm64/boot/dts/qcom/qcs615.dtsi | 449 +++++++++++++++++++++++++++++++++++
>>   1 file changed, 449 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/qcs615.dtsi b/arch/arm64/boot/dts/qcom/qcs615.dtsi
>> new file mode 100644
>> index 000000000000..cf7aaa7f6131
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/qcom/qcs615.dtsi
>> @@ -0,0 +1,449 @@
>> +// SPDX-License-Identifier: BSD-3-Clause
>> +/*
>> + * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.
>> + */
>> +
>> +#include <dt-bindings/interrupt-controller/arm-gic.h>
>> +
>> +/ {
>> +	interrupt-parent = <&intc>;
>> +
> 
> No need for blank line.
Well noted. Will update in the next patch.
> 
>> +	#address-cells = <2>;
>> +	#size-cells = <2>;
>> +
>> +	chosen { };
> 
> Drop, redundant.
Well noted. Will update in the next patch.
> 
>> +
>> +	clocks {
>> +		xo_board: xo-board {
> 
> xo-clk? xo-board-clk?
> 
> But if board, this does not sound like part of SoC. See other files how
> they do it.
> 
Other files also added ‘xo_board’. The ‘xo_board’ is the clock that will 
be used by other SoC nodes, such as rpmhcc. Currently, the node can be 
deleted as no one is using it.
> 
>> +			compatible = "fixed-clock";
>> +			clock-frequency = <38400000>;
>> +			#clock-cells = <0>;
>> +		};
>> +
>> +		sleep_clk: sleep-clk {
>> +			compatible = "fixed-clock";
>> +			clock-frequency = <32000>;
>> +			#clock-cells = <0>;
>> +		};
>> +	};
>> +
>> +	cpus {
>> +		#address-cells = <2>;
>> +		#size-cells = <0>;
>> +
>> +		CPU0: cpu@0 {
> 
> labels are lowercase.
Well noted. Will update in the next patch.
> 
>> +			device_type = "cpu";
>> +			compatible = "arm,cortex-a55";
>> +			reg = <0x0 0x0>;
>> +			enable-method = "psci";
>> +			power-domains = <&CPU_PD0>;
>> +			power-domain-names = "psci";
>> +			next-level-cache = <&L2_0>;
>> +			#cooling-cells = <2>;
>> +
>> +			L2_0: l2-cache {
> 
> lowercase
Well noted. Will update in the next patch.
> 
>> +			      compatible = "cache";
>> +			      cache-level = <2>;
>> +			      cache-unified;
>> +			      next-level-cache = <&L3_0>;
> 
> Best regards,
> Krzysztof
> 
> 

-- 
Thx and BRs
Lijuan Gao

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