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Message-ID: <20240828-add_initial_support_for_qcs615-v1-0-5599869ea10f@quicinc.com>
Date: Wed, 28 Aug 2024 10:02:10 +0800
From: Lijuan Gao <quic_lijuang@...cinc.com>
To: Thomas Gleixner <tglx@...utronix.de>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio
<konradybcio@...nel.org>
CC: <kernel@...cinc.com>, <linux-arm-msm@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>,
Lijuan Gao
<quic_lijuang@...cinc.com>
Subject: [PATCH 0/6] Add initial support for QCS615
Add initial support for QCS615 SoC and QCS615 RIDE board with basic
description of CPUs, interrupt-controller and cpu idle, which enable
the board boot to shell with dcc console.
Signed-off-by: Lijuan Gao <quic_lijuang@...cinc.com>
---
Lijuan Gao (6):
dt-bindings: qcom,pdc: document QCS615 Power Domain Controller
dt-bindings: arm: qcom: document QCS615 and the reference board
dt-bindings: arm: qcom,ids: add SoC ID for QCS615
soc: qcom: socinfo: Add QCS615 SoC ID table entry
arm64: dts: qcom: add initial support for QCS615 DTSI
arm64: dts: qcom: add base QCS615 RIDE dts
Documentation/devicetree/bindings/arm/qcom.yaml | 6 +
.../bindings/interrupt-controller/qcom,pdc.yaml | 1 +
arch/arm64/boot/dts/qcom/Makefile | 1 +
arch/arm64/boot/dts/qcom/qcs615-ride.dts | 15 +
arch/arm64/boot/dts/qcom/qcs615.dtsi | 449 +++++++++++++++++++++
drivers/soc/qcom/socinfo.c | 1 +
include/dt-bindings/arm/qcom,ids.h | 1 +
7 files changed, 474 insertions(+)
---
base-commit: 0dec408547d2a9e21ea44eab538a1ca852f0be0d
change-id: 20240827-add_initial_support_for_qcs615-3f3823c3c518
Best regards,
--
Lijuan Gao <quic_lijuang@...cinc.com>
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