linux-kernel - Re: [PATCH v3 1/1] mtd: spinand: Add flags for the Plane Select bit

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Message-ID: <20240828115224.28ab48dc@xps-13>
Date: Wed, 28 Aug 2024 11:52:24 +0200
From: Miquel Raynal <miquel.raynal@...tlin.com>
To: Cheng Ming Lin <linchengming884@...il.com>
Cc: vigneshr@...com, linux-mtd@...ts.infradead.org,
 linux-kernel@...r.kernel.org, richard@....at, alvinzhou@...c.com.tw,
 leoyu@...c.com.tw, Cheng Ming Lin <chengminglin@...c.com.tw>
Subject: Re: [PATCH v3 1/1] mtd: spinand: Add flags for the Plane Select bit

Hi Cheng,

> > > @@ -263,7 +266,7 @@ static const struct spinand_info macronix_spinand_table[] = {
> > >                    SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
> > >                                             &write_cache_variants,
> > >                                             &update_cache_variants),
> > > -                  SPINAND_HAS_QE_BIT,
> > > +                  SPINAND_HAS_QE_BIT | SPINAND_HAS_PP_PLANE_SELECT_BIT,
> > >                    SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
> > >                                    mx35lf1ge4ab_ecc_get_status)),
> > >       SPINAND_INFO("MX35UF2G24AD-Z4I8",
> > > diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h
> > > index 5c19ead60499..cec451e7c71c 100644
> > > --- a/include/linux/mtd/spinand.h
> > > +++ b/include/linux/mtd/spinand.h
> > > @@ -312,6 +312,8 @@ struct spinand_ecc_info {
> > >
> > >  #define SPINAND_HAS_QE_BIT           BIT(0)
> > >  #define SPINAND_HAS_CR_FEAT_BIT              BIT(1)
> > > +#define SPINAND_HAS_PP_PLANE_SELECT_BIT              BIT(2)
> > > +#define SPINAND_HAS_READ_PLANE_SELECT_BIT            BIT(3)  
> >
> > Do you think we can have the PP plane select bit without the read plane
> > select bit? I'd use a single flag for now.  
> 
> Macronix serial NAND flash with a two-plane structure always requires
> the insertion of the Plane Select bit in the write_to_cache function. However,
> only the MX35{U,F}2G14AC and MX35LF2GE4AB require the insertion of the
> Plane Select bit in the read_from_cache function.
> 
> However, I have observed that for flash requiring the insertion of the
> Plane Select
> bit during the read_from_cache operation, the ECC strength is 4.
> 
> Can we use the ECC strength in conjunction with the
> SPINAND_HAS_PP_PLANE_SELECT_BIT flag to determine
> whether the Plane Select bit needs to be inserted during the
> read_from_cache operation?
> 
> This method cannot guarantee that a new flash witha two-plane
> structure requiring the insertion of the Plane Select bit will have
> an ECC strength of 4.
> 
> Based on the above points, I think we need to use two separate flags
> to handle these requirements effectively.

Indeed, please use two flags.

Thanks,
Miquèl