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Message-ID: <1684855f-5901-459a-beb7-2569003b30ac@linaro.org>
Date: Wed, 28 Aug 2024 14:22:37 +0200
From: Neil Armstrong <neil.armstrong@...aro.org>
To: Stephen Boyd <swboyd@...omium.org>, Konrad Dybcio
 <konradybcio@...nel.org>, Bjorn Andersson <andersson@...nel.org>,
 Stephen Boyd <sboyd@...nel.org>
Cc: linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
 patches@...ts.linux.dev, linux-clk@...r.kernel.org,
 Taniya Das <quic_tdas@...cinc.com>, Amit Pundir <amit.pundir@...aro.org>
Subject: Re: [PATCH v2 2/2] clk: qcom: gcc-sm8550: Don't use shared clk_ops
 for QUPs

On 28/08/2024 01:12, Stephen Boyd wrote:
> The QUPs aren't shared in a way that requires parking the RCG at an
> always on parent in case some other entity turns on the clk. The
> hardware is capable of setting a new frequency itself with the DFS mode,
> so parking is unnecessary. Furthermore, there aren't any GDSCs for these
> devices, so there isn't a possibility of the GDSC turning on the clks
> for housekeeping purposes.
> 
> This wasn't a problem to mark these clks shared until we started parking
> shared RCGs at clk registration time in commit 01a0a6cc8cfd ("clk: qcom:
> Park shared RCGs upon registration"). Parking at init is actually
> harmful to the UART when earlycon is used. If the device is pumping out
> data while the frequency changes you'll see garbage on the serial
> console until the driver can probe and actually set a proper frequency.
> 
> Revert the QUP part of commit 929c75d57566 ("clk: qcom: gcc-sm8550: Mark
> RCGs shared where applicable") so that the QUPs don't get parked during
> clk registration and break UART operations.
> 
> Fixes: 01a0a6cc8cfd ("clk: qcom: Park shared RCGs upon registration")
> Fixes: 929c75d57566 ("clk: qcom: gcc-sm8550: Mark RCGs shared where applicable")
> Cc: Konrad Dybcio <konradybcio@...nel.org>
> Cc: Bjorn Andersson <andersson@...nel.org>
> Cc: Taniya Das <quic_tdas@...cinc.com>
> Cc: Neil Armstrong <neil.armstrong@...aro.org>
> Reported-by: Amit Pundir <amit.pundir@...aro.org>
> Closes: https://lore.kernel.org/CAMi1Hd1KQBE4kKUdAn8E5FV+BiKzuv+8FoyWQrrTHPDoYTuhgA@mail.gmail.com
> Tested-by: Amit Pundir <amit.pundir@...aro.org>
> Signed-off-by: Stephen Boyd <swboyd@...omium.org>
> ---
>   drivers/clk/qcom/gcc-sm8550.c | 52 +++++++++++++++++------------------
>   1 file changed, 26 insertions(+), 26 deletions(-)
> 
> diff --git a/drivers/clk/qcom/gcc-sm8550.c b/drivers/clk/qcom/gcc-sm8550.c
> index 7944ddb4b47d..0244a05866b8 100644
> --- a/drivers/clk/qcom/gcc-sm8550.c
> +++ b/drivers/clk/qcom/gcc-sm8550.c
> @@ -536,7 +536,7 @@ static struct clk_rcg2 gcc_qupv3_i2c_s0_clk_src = {
>   		.parent_data = gcc_parent_data_0,
>   		.num_parents = ARRAY_SIZE(gcc_parent_data_0),
>   		.flags = CLK_SET_RATE_PARENT,
> -		.ops = &clk_rcg2_shared_ops,
> +		.ops = &clk_rcg2_ops,
>   	},
>   };
>   
> @@ -551,7 +551,7 @@ static struct clk_rcg2 gcc_qupv3_i2c_s1_clk_src = {
>   		.parent_data = gcc_parent_data_0,
>   		.num_parents = ARRAY_SIZE(gcc_parent_data_0),
>   		.flags = CLK_SET_RATE_PARENT,
> -		.ops = &clk_rcg2_shared_ops,
> +		.ops = &clk_rcg2_ops,
>   	},
>   };
>   
> @@ -566,7 +566,7 @@ static struct clk_rcg2 gcc_qupv3_i2c_s2_clk_src = {
>   		.parent_data = gcc_parent_data_0,
>   		.num_parents = ARRAY_SIZE(gcc_parent_data_0),
>   		.flags = CLK_SET_RATE_PARENT,
> -		.ops = &clk_rcg2_shared_ops,
> +		.ops = &clk_rcg2_ops,
>   	},
>   };
>   
> @@ -581,7 +581,7 @@ static struct clk_rcg2 gcc_qupv3_i2c_s3_clk_src = {
>   		.parent_data = gcc_parent_data_0,
>   		.num_parents = ARRAY_SIZE(gcc_parent_data_0),
>   		.flags = CLK_SET_RATE_PARENT,
> -		.ops = &clk_rcg2_shared_ops,
> +		.ops = &clk_rcg2_ops,
>   	},
>   };
>   
> @@ -596,7 +596,7 @@ static struct clk_rcg2 gcc_qupv3_i2c_s4_clk_src = {
>   		.parent_data = gcc_parent_data_0,
>   		.num_parents = ARRAY_SIZE(gcc_parent_data_0),
>   		.flags = CLK_SET_RATE_PARENT,
> -		.ops = &clk_rcg2_shared_ops,
> +		.ops = &clk_rcg2_ops,
>   	},
>   };
>   
> @@ -611,7 +611,7 @@ static struct clk_rcg2 gcc_qupv3_i2c_s5_clk_src = {
>   		.parent_data = gcc_parent_data_0,
>   		.num_parents = ARRAY_SIZE(gcc_parent_data_0),
>   		.flags = CLK_SET_RATE_PARENT,
> -		.ops = &clk_rcg2_shared_ops,
> +		.ops = &clk_rcg2_ops,
>   	},
>   };
>   
> @@ -626,7 +626,7 @@ static struct clk_rcg2 gcc_qupv3_i2c_s6_clk_src = {
>   		.parent_data = gcc_parent_data_0,
>   		.num_parents = ARRAY_SIZE(gcc_parent_data_0),
>   		.flags = CLK_SET_RATE_PARENT,
> -		.ops = &clk_rcg2_shared_ops,
> +		.ops = &clk_rcg2_ops,
>   	},
>   };
>   
> @@ -641,7 +641,7 @@ static struct clk_rcg2 gcc_qupv3_i2c_s7_clk_src = {
>   		.parent_data = gcc_parent_data_0,
>   		.num_parents = ARRAY_SIZE(gcc_parent_data_0),
>   		.flags = CLK_SET_RATE_PARENT,
> -		.ops = &clk_rcg2_shared_ops,
> +		.ops = &clk_rcg2_ops,
>   	},
>   };
>   
> @@ -656,7 +656,7 @@ static struct clk_rcg2 gcc_qupv3_i2c_s8_clk_src = {
>   		.parent_data = gcc_parent_data_0,
>   		.num_parents = ARRAY_SIZE(gcc_parent_data_0),
>   		.flags = CLK_SET_RATE_PARENT,
> -		.ops = &clk_rcg2_shared_ops,
> +		.ops = &clk_rcg2_ops,
>   	},
>   };
>   
> @@ -671,7 +671,7 @@ static struct clk_rcg2 gcc_qupv3_i2c_s9_clk_src = {
>   		.parent_data = gcc_parent_data_0,
>   		.num_parents = ARRAY_SIZE(gcc_parent_data_0),
>   		.flags = CLK_SET_RATE_PARENT,
> -		.ops = &clk_rcg2_shared_ops,
> +		.ops = &clk_rcg2_ops,
>   	},
>   };
>   
> @@ -700,7 +700,7 @@ static struct clk_init_data gcc_qupv3_wrap1_s0_clk_src_init = {
>   	.parent_data = gcc_parent_data_0,
>   	.num_parents = ARRAY_SIZE(gcc_parent_data_0),
>   	.flags = CLK_SET_RATE_PARENT,
> -	.ops = &clk_rcg2_shared_ops,
> +	.ops = &clk_rcg2_ops,
>   };
>   
>   static struct clk_rcg2 gcc_qupv3_wrap1_s0_clk_src = {
> @@ -717,7 +717,7 @@ static struct clk_init_data gcc_qupv3_wrap1_s1_clk_src_init = {
>   	.parent_data = gcc_parent_data_0,
>   	.num_parents = ARRAY_SIZE(gcc_parent_data_0),
>   	.flags = CLK_SET_RATE_PARENT,
> -	.ops = &clk_rcg2_shared_ops,
> +	.ops = &clk_rcg2_ops,
>   };
>   
>   static struct clk_rcg2 gcc_qupv3_wrap1_s1_clk_src = {
> @@ -750,7 +750,7 @@ static struct clk_init_data gcc_qupv3_wrap1_s2_clk_src_init = {
>   	.parent_data = gcc_parent_data_0,
>   	.num_parents = ARRAY_SIZE(gcc_parent_data_0),
>   	.flags = CLK_SET_RATE_PARENT,
> -	.ops = &clk_rcg2_shared_ops,
> +	.ops = &clk_rcg2_ops,
>   };
>   
>   static struct clk_rcg2 gcc_qupv3_wrap1_s2_clk_src = {
> @@ -767,7 +767,7 @@ static struct clk_init_data gcc_qupv3_wrap1_s3_clk_src_init = {
>   	.parent_data = gcc_parent_data_0,
>   	.num_parents = ARRAY_SIZE(gcc_parent_data_0),
>   	.flags = CLK_SET_RATE_PARENT,
> -	.ops = &clk_rcg2_shared_ops,
> +	.ops = &clk_rcg2_ops,
>   };
>   
>   static struct clk_rcg2 gcc_qupv3_wrap1_s3_clk_src = {
> @@ -784,7 +784,7 @@ static struct clk_init_data gcc_qupv3_wrap1_s4_clk_src_init = {
>   	.parent_data = gcc_parent_data_0,
>   	.num_parents = ARRAY_SIZE(gcc_parent_data_0),
>   	.flags = CLK_SET_RATE_PARENT,
> -	.ops = &clk_rcg2_shared_ops,
> +	.ops = &clk_rcg2_ops,
>   };
>   
>   static struct clk_rcg2 gcc_qupv3_wrap1_s4_clk_src = {
> @@ -801,7 +801,7 @@ static struct clk_init_data gcc_qupv3_wrap1_s5_clk_src_init = {
>   	.parent_data = gcc_parent_data_0,
>   	.num_parents = ARRAY_SIZE(gcc_parent_data_0),
>   	.flags = CLK_SET_RATE_PARENT,
> -	.ops = &clk_rcg2_shared_ops,
> +	.ops = &clk_rcg2_ops,
>   };
>   
>   static struct clk_rcg2 gcc_qupv3_wrap1_s5_clk_src = {
> @@ -818,7 +818,7 @@ static struct clk_init_data gcc_qupv3_wrap1_s6_clk_src_init = {
>   	.parent_data = gcc_parent_data_0,
>   	.num_parents = ARRAY_SIZE(gcc_parent_data_0),
>   	.flags = CLK_SET_RATE_PARENT,
> -	.ops = &clk_rcg2_shared_ops,
> +	.ops = &clk_rcg2_ops,
>   };
>   
>   static struct clk_rcg2 gcc_qupv3_wrap1_s6_clk_src = {
> @@ -835,7 +835,7 @@ static struct clk_init_data gcc_qupv3_wrap1_s7_clk_src_init = {
>   	.parent_data = gcc_parent_data_0,
>   	.num_parents = ARRAY_SIZE(gcc_parent_data_0),
>   	.flags = CLK_SET_RATE_PARENT,
> -	.ops = &clk_rcg2_shared_ops,
> +	.ops = &clk_rcg2_ops,
>   };
>   
>   static struct clk_rcg2 gcc_qupv3_wrap1_s7_clk_src = {
> @@ -852,7 +852,7 @@ static struct clk_init_data gcc_qupv3_wrap2_s0_clk_src_init = {
>   	.parent_data = gcc_parent_data_0,
>   	.num_parents = ARRAY_SIZE(gcc_parent_data_0),
>   	.flags = CLK_SET_RATE_PARENT,
> -	.ops = &clk_rcg2_shared_ops,
> +	.ops = &clk_rcg2_ops,
>   };
>   
>   static struct clk_rcg2 gcc_qupv3_wrap2_s0_clk_src = {
> @@ -869,7 +869,7 @@ static struct clk_init_data gcc_qupv3_wrap2_s1_clk_src_init = {
>   	.parent_data = gcc_parent_data_0,
>   	.num_parents = ARRAY_SIZE(gcc_parent_data_0),
>   	.flags = CLK_SET_RATE_PARENT,
> -	.ops = &clk_rcg2_shared_ops,
> +	.ops = &clk_rcg2_ops,
>   };
>   
>   static struct clk_rcg2 gcc_qupv3_wrap2_s1_clk_src = {
> @@ -886,7 +886,7 @@ static struct clk_init_data gcc_qupv3_wrap2_s2_clk_src_init = {
>   	.parent_data = gcc_parent_data_0,
>   	.num_parents = ARRAY_SIZE(gcc_parent_data_0),
>   	.flags = CLK_SET_RATE_PARENT,
> -	.ops = &clk_rcg2_shared_ops,
> +	.ops = &clk_rcg2_ops,
>   };
>   
>   static struct clk_rcg2 gcc_qupv3_wrap2_s2_clk_src = {
> @@ -903,7 +903,7 @@ static struct clk_init_data gcc_qupv3_wrap2_s3_clk_src_init = {
>   	.parent_data = gcc_parent_data_0,
>   	.num_parents = ARRAY_SIZE(gcc_parent_data_0),
>   	.flags = CLK_SET_RATE_PARENT,
> -	.ops = &clk_rcg2_shared_ops,
> +	.ops = &clk_rcg2_ops,
>   };
>   
>   static struct clk_rcg2 gcc_qupv3_wrap2_s3_clk_src = {
> @@ -920,7 +920,7 @@ static struct clk_init_data gcc_qupv3_wrap2_s4_clk_src_init = {
>   	.parent_data = gcc_parent_data_0,
>   	.num_parents = ARRAY_SIZE(gcc_parent_data_0),
>   	.flags = CLK_SET_RATE_PARENT,
> -	.ops = &clk_rcg2_shared_ops,
> +	.ops = &clk_rcg2_ops,
>   };
>   
>   static struct clk_rcg2 gcc_qupv3_wrap2_s4_clk_src = {
> @@ -937,7 +937,7 @@ static struct clk_init_data gcc_qupv3_wrap2_s5_clk_src_init = {
>   	.parent_data = gcc_parent_data_0,
>   	.num_parents = ARRAY_SIZE(gcc_parent_data_0),
>   	.flags = CLK_SET_RATE_PARENT,
> -	.ops = &clk_rcg2_shared_ops,
> +	.ops = &clk_rcg2_ops,
>   };
>   
>   static struct clk_rcg2 gcc_qupv3_wrap2_s5_clk_src = {
> @@ -975,7 +975,7 @@ static struct clk_init_data gcc_qupv3_wrap2_s6_clk_src_init = {
>   	.parent_data = gcc_parent_data_8,
>   	.num_parents = ARRAY_SIZE(gcc_parent_data_8),
>   	.flags = CLK_SET_RATE_PARENT,
> -	.ops = &clk_rcg2_shared_ops,
> +	.ops = &clk_rcg2_ops,
>   };
>   
>   static struct clk_rcg2 gcc_qupv3_wrap2_s6_clk_src = {
> @@ -992,7 +992,7 @@ static struct clk_init_data gcc_qupv3_wrap2_s7_clk_src_init = {
>   	.parent_data = gcc_parent_data_0,
>   	.num_parents = ARRAY_SIZE(gcc_parent_data_0),
>   	.flags = CLK_SET_RATE_PARENT,
> -	.ops = &clk_rcg2_shared_ops,
> +	.ops = &clk_rcg2_ops,
>   };
>   
>   static struct clk_rcg2 gcc_qupv3_wrap2_s7_clk_src = {

I think you missed gcc_qupv3_wrap2_s7_clk_src


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