[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-ID: <20240829180726.5022-1-suravee.suthikulpanit@amd.com>
Date: Thu, 29 Aug 2024 18:07:21 +0000
From: Suravee Suthikulpanit <suravee.suthikulpanit@....com>
To: <linux-kernel@...r.kernel.org>, <iommu@...ts.linux.dev>
CC: <joro@...tes.org>, <robin.murphy@....com>, <vasant.hegde@....com>,
<ubizjak@...il.com>, <jgg@...dia.com>, <jon.grimm@....com>,
<santosh.shukla@....com>, <pandoh@...gle.com>, <kumaranand@...gle.com>,
Suravee Suthikulpanit <suravee.suthikulpanit@....com>
Subject: [PATCH v2 0/5] iommu/amd: Use 128-bit cmpxchg operation to update DTE
The v2 series splits the v1 patch to address several concerns in review feedback
(https://lore.kernel.org/lkml/e937e26f-038a-6d01-76a9-76c86760ca4a@gmail.com/T/).
Changelog:
* Patch 1, 2, 5 are new.
* Patch 3:
- Change struct dev_table_entry to union,
- Fix update_dte256() per feedback from v1
- Add get_dte256() helper function
* Patch 4: Refactoring set_dte_entry
Thanks,
Suravee
Suravee Suthikulpanit (5):
iommu/amd: Disable AMD IOMMU if CMPXCHG16B feature is not supported
iommu/amd: Introduce rw_semaphore for Device Table Entry (DTE)
iommu/amd: Introduce helper functions to access and update 256-bit DTE
iommu/amd: Modify set_dte_entry() to use 256-bit DTE helpers
iommu/amd: Use 128-bit cmpxchg in set_dte_irq_entry()
drivers/iommu/amd/amd_iommu_types.h | 6 +-
drivers/iommu/amd/init.c | 23 ++-
drivers/iommu/amd/iommu.c | 237 ++++++++++++++++++----------
3 files changed, 171 insertions(+), 95 deletions(-)
--
2.34.1
Powered by blists - more mailing lists