linux-kernel - Re: [PATCH v3 0/2] phy: qcom: qmp-pcie: Add support for Gen4 4-lane mode for X1E80100

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Message-Id: <172495833400.405683.4328817324548517864.b4-ty@kernel.org>
Date: Fri, 30 Aug 2024 00:35:34 +0530
From: Vinod Koul <vkoul@...nel.org>
To: Kishon Vijay Abraham I <kishon@...nel.org>, 
 Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, 
 Conor Dooley <conor+dt@...nel.org>, Abel Vesa <abel.vesa@...aro.org>
Cc: Johan Hovold <johan@...nel.org>, linux-arm-msm@...r.kernel.org, 
 linux-phy@...ts.infradead.org, devicetree@...r.kernel.org, 
 linux-kernel@...r.kernel.org, Krzysztof Kozlowski <krzk@...nel.org>, 
 Johan Hovold <johan+linaro@...nel.org>
Subject: Re: [PATCH v3 0/2] phy: qcom: qmp-pcie: Add support for Gen4
 4-lane mode for X1E80100


On Fri, 23 Aug 2024 10:04:14 +0300, Abel Vesa wrote:
> On all X Elite boards currently supported upstream, the NVMe sits
> on the PCIe 6. Until now that has been configured in dual lane mode
> only. The schematics reveal that the NVMe is actually using 4 lanes.
> So add support for the 4-lane mode and document the compatible for it.
> 
> This patchset depends on:
> https://lore.kernel.org/all/20240805-phy-qcom-qmp-pcie-write-all-tbls-second-port-v3-1-6967c6bf61d1@linaro.org/
> 
> [...]

Applied, thanks!

[1/2] dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Document the X1E80100 QMP PCIe PHY Gen4 x4
      commit: 0c5f4d23f77631f657b60ef660676303f7620688
[2/2] phy: qcom: qmp-pcie: Add Gen4 4-lanes mode for X1E80100
      commit: 9dab00ee95447b286ebb0ada3a5edc00beab3750

Best regards,
-- 
~Vinod