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Message-ID: <746be896-8798-44b0-aa86-e77cf34655e1@kernel.org>
Date: Thu, 29 Aug 2024 09:49:56 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Nikunj Kela <quic_nkela@...cinc.com>, andersson@...nel.org,
 konradybcio@...nel.org, robh@...nel.org, krzk+dt@...nel.org,
 conor+dt@...nel.org, rafael@...nel.org, viresh.kumar@...aro.org,
 herbert@...dor.apana.org.au, davem@...emloft.net, sudeep.holla@....com,
 andi.shyti@...nel.org, tglx@...utronix.de, will@...nel.org, joro@...tes.org,
 jassisinghbrar@...il.com, lee@...nel.org, linus.walleij@...aro.org,
 amitk@...nel.org, thara.gopinath@...il.com, broonie@...nel.org,
 wim@...ux-watchdog.org, linux@...ck-us.net
Cc: robin.murphy@....com, cristian.marussi@....com, rui.zhang@...el.com,
 lukasz.luba@....com, vkoul@...nel.org, quic_gurus@...cinc.com,
 agross@...nel.org, bartosz.golaszewski@...aro.org, quic_rjendra@...cinc.com,
 robimarko@...il.com, linux-arm-msm@...r.kernel.org,
 devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
 linux-pm@...r.kernel.org, linux-crypto@...r.kernel.org,
 arm-scmi@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
 linux-i2c@...r.kernel.org, iommu@...ts.linux.dev,
 linux-gpio@...r.kernel.org, linux-serial@...r.kernel.org,
 linux-spi@...r.kernel.org, linux-watchdog@...r.kernel.org,
 kernel@...cinc.com, quic_psodagud@...cinc.com, quic_tsoni@...cinc.com,
 quic_shazhuss@...cinc.com
Subject: Re: [PATCH 22/22] arm64: dts: qcom: Add reduced functional DT for
 SA8255p Ride platform

On 28/08/2024 22:37, Nikunj Kela wrote:
> SA8255p Ride platform is an automotive virtual platform. This platform
> abstracts resources such as clocks, regulators etc. in the firmware VM.
> The device drivers request resources operations over SCMI using power,
> performance, reset and sensor protocols.
> 
> Multiple virtual SCMI instances are being employed for greater parallelism.
> These instances are tied to devices such that devices can have dedicated
> SCMI channel. Firmware VM (runs SCMI platform stack) is SMP enabled and
> can process requests from agents in parallel. Qualcomm smc transport is
> used for communication between SCMI agent and platform.
> 
> Let's add the reduced functional support for SA8255p Ride board.
> Subsequently, the support for PCIe, USB, UFS, Ethernet will be added.
> 
> Co-developed-by: Shazad Hussain <quic_shazhuss@...cinc.com>
> Signed-off-by: Shazad Hussain <quic_shazhuss@...cinc.com>
> Signed-off-by: Nikunj Kela <quic_nkela@...cinc.com>
> ---
>  arch/arm64/boot/dts/qcom/Makefile           |    1 +
>  arch/arm64/boot/dts/qcom/sa8255p-pmics.dtsi |   80 +
>  arch/arm64/boot/dts/qcom/sa8255p-ride.dts   |  149 ++
>  arch/arm64/boot/dts/qcom/sa8255p-scmi.dtsi  | 2312 ++++++++++++++++++
>  arch/arm64/boot/dts/qcom/sa8255p.dtsi       | 2405 +++++++++++++++++++
>  5 files changed, 4947 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/qcom/sa8255p-pmics.dtsi
>  create mode 100644 arch/arm64/boot/dts/qcom/sa8255p-ride.dts
>  create mode 100644 arch/arm64/boot/dts/qcom/sa8255p-scmi.dtsi
>  create mode 100644 arch/arm64/boot/dts/qcom/sa8255p.dtsi
> 

...

> diff --git a/arch/arm64/boot/dts/qcom/sa8255p-ride.dts b/arch/arm64/boot/dts/qcom/sa8255p-ride.dts
> new file mode 100644
> index 000000000000..1dc03051ad92
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/sa8255p-ride.dts
> @@ -0,0 +1,149 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +/*
> + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
> + */
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/gpio/gpio.h>
> +
> +#include "sa8255p.dtsi"
> +#include "sa8255p-pmics.dtsi"
> +#include "sa8255p-scmi.dtsi"
> +
> +/ {
> +	model = "Qualcomm Technologies, Inc. SA8255P Ride";
> +	compatible = "qcom,sa8255p-ride", "qcom,sa8255p";
> +
> +	aliases {
> +		i2c11 = &i2c11;
> +		i2c18 = &i2c18;
> +		serial0 = &uart10;
> +		serial1 = &uart4;
> +		spi16 = &spi16;
> +		scmichannels = &scmichannels;

Nothing parses this.



> +
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> +&firmware {
> +	scmi0: scmi0 {

scmi-0


> +		compatible = "qcom,scmi-smc";
> +		arm,smc-id = <0xc6008012>;
> +		shmem = <&shmem0>;
> +
> +		interrupts = <GIC_SPI 963 IRQ_TYPE_EDGE_RISING>;
> +		interrupt-names = "a2p";
> +
> +		max-rx-timeout-ms = <3000>;
> +
> +		status = "disabled";

status is the last property (from properties)


...

> +
> +&soc {
> +	scmichannels: sram@...00000 {
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +		compatible = "mmio-sram";
> +		reg = <0x0 0xd0000000 0x0 0x40000>;
> +		ranges = <0x0 0x0 0x0 0xffffffff>;
> +
> +		shmem0: scmi-sram@...00000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd0000000 0x1000>;
> +		};
> +
> +		shmem1: scmi-sram@...01000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd0001000 0x1000>;
> +		};
> +
> +		shmem2: scmi-sram@...02000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd0002000 0x1000>;
> +		};
> +
> +		shmem3: scmi-sram@...03000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd0003000 0x1000>;
> +		};
> +
> +		shmem4: scmi-sram@...04000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd0004000 0x1000>;
> +		};
> +
> +		shmem5: scmi-sram@...05000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd0005000 0x1000>;
> +		};
> +
> +		shmem6: scmi-sram@...06000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd0006000 0x1000>;
> +		};
> +
> +		shmem7: scmi-sram@...07000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd0007000 0x1000>;
> +		};
> +
> +		shmem8: scmi-sram@...08000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd0008000 0x1000>;
> +		};
> +
> +		shmem9: scmi-sram@...09000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd0009000 0x1000>;
> +		};
> +
> +		shmem10: scmi-sram@...0a000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd000a000 0x1000>;
> +		};
> +
> +		shmem11: scmi-sram@...0b000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd000b000 0x1000>;
> +		};
> +
> +		shmem12: scmi-sram@...0c000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd000c000 0x1000>;
> +		};
> +
> +		shmem13: scmi-sram@...0d000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd000d000 0x1000>;
> +		};
> +
> +		shmem14: scmi-sram@...0e000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd000e000 0x1000>;
> +		};
> +
> +		shmem15: scmi-sram@...0f000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd000f000 0x1000>;
> +		};
> +
> +		shmem16: scmi-sram@...10000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd0010000 0x1000>;
> +		};
> +
> +		shmem17: scmi-sram@...11000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd0011000 0x1000>;
> +		};
> +
> +		shmem18: scmi-sram@...12000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd0012000 0x1000>;
> +		};
> +
> +		shmem19: scmi-sram@...13000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd0013000 0x1000>;
> +		};
> +
> +		shmem20: scmi-sram@...14000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd0014000 0x1000>;
> +		};
> +
> +		shmem21: scmi-sram@...15000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd0015000 0x1000>;
> +		};
> +
> +		shmem22: scmi-sram@...16000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd0016000 0x1000>;
> +		};
> +
> +		shmem23: scmi-sram@...17000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd0017000 0x1000>;
> +		};
> +
> +		shmem24: scmi-sram@...18000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd0018000 0x1000>;
> +		};
> +
> +		shmem25: scmi-sram@...19000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd0019000 0x1000>;
> +		};
> +
> +		shmem26: scmi-sram@...1a000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd001a000 0x1000>;
> +		};
> +
> +		shmem27: scmi-sram@...1b000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd001b000 0x1000>;
> +		};
> +
> +		shmem28: scmi-sram@...1c000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd001c000 0x1000>;
> +		};
> +
> +		shmem29: scmi-sram@...1d000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd001d000 0x1000>;
> +		};
> +
> +		shmem30: scmi-sram@...1e000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd001e000 0x1000>;
> +		};
> +
> +		shmem31: scmi-sram@...1f000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd001f000 0x1000>;
> +		};
> +
> +		shmem32: scmi-sram@...20000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd0020000 0x1000>;
> +		};
> +
> +		shmem33: scmi-sram@...21000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd0021000 0x1000>;
> +		};
> +
> +		shmem34: scmi-sram@...22000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd0022000 0x1000>;
> +		};
> +
> +		shmem35: scmi-sram@...23000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd0023000 0x1000>;
> +		};
> +
> +		shmem36: scmi-sram@...24000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd0024000 0x1000>;
> +		};
> +
> +		shmem37: scmi-sram@...25000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd0025000 0x1000>;
> +		};
> +
> +		shmem38: scmi-sram@...26000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd0026000 0x1000>;
> +		};
> +
> +		shmem39: scmi-sram@...27000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd0027000 0x1000>;
> +		};
> +
> +		shmem40: scmi-sram@...28000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd0028000 0x1000>;
> +		};
> +
> +		shmem41: scmi-sram@...29000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd0029000 0x1000>;
> +		};
> +
> +		shmem42: scmi-sram@...2a000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd002a000 0x1000>;
> +		};
> +
> +		shmem43: scmi-sram@...2b000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd002b000 0x1000>;
> +		};
> +
> +		shmem44: scmi-sram@...2c000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd002c000 0x1000>;
> +		};
> +
> +		shmem45: scmi-sram@...2d000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd002d000 0x1000>;
> +		};
> +
> +		shmem46: scmi-sram@...2e000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd002e000 0x1000>;
> +		};
> +
> +		shmem47: scmi-sram@...2f000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd002f000 0x1000>;
> +		};
> +
> +		shmem48: scmi-sram@...30000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd0030000 0x1000>;
> +		};
> +
> +		shmem49: scmi-sram@...31000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd0031000 0x1000>;
> +		};
> +
> +		shmem50: scmi-sram@...32000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd0032000 0x1000>;
> +		};
> +
> +		shmem51: scmi-sram@...33000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd0033000 0x1000>;
> +		};
> +
> +		shmem52: scmi-sram@...34000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd0034000 0x1000>;
> +		};
> +
> +		shmem53: scmi-sram@...35000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd0035000 0x1000>;
> +		};
> +
> +		shmem54: scmi-sram@...36000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd0036000 0x1000>;
> +		};
> +
> +		shmem55: scmi-sram@...37000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd0037000 0x1000>;
> +		};
> +
> +		shmem56: scmi-sram@...38000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd0038000 0x1000>;
> +		};
> +
> +		shmem57: scmi-sram@...39000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd0039000 0x1000>;
> +		};
> +
> +		shmem58: scmi-sram@...3a000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd003a000 0x1000>;
> +		};
> +
> +		shmem59: scmi-sram@...3b000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd003b000 0x1000>;
> +		};
> +
> +		shmem60: scmi-sram@...3c000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd003c000 0x1000>;
> +		};
> +
> +		shmem61: scmi-sram@...3d000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd003d000 0x1000>;
> +		};
> +
> +		shmem62: scmi-sram@...3e000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd003e000 0x1000>;
> +		};
> +
> +		shmem63: scmi-sram@...3f000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0xd003f000 0x1000>;
> +		};
> +	};
> +};
> diff --git a/arch/arm64/boot/dts/qcom/sa8255p.dtsi b/arch/arm64/boot/dts/qcom/sa8255p.dtsi
> new file mode 100644
> index 000000000000..c354f76ffa5e
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/sa8255p.dtsi
> @@ -0,0 +1,2405 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +/*
> + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
> + */
> +
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/mailbox/qcom-ipcc.h>
> +
> +/ {
> +	interrupt-parent = <&intc>;
> +
> +	#address-cells = <2>;
> +	#size-cells = <2>;
> +
> +	clocks {
> +		xo_board_clk: xo-board-clk {
> +			compatible = "fixed-clock";
> +			#clock-cells = <0>;
> +		};
> +
> +		sleep_clk: sleep-clk {
> +			compatible = "fixed-clock";
> +			#clock-cells = <0>;
> +		};
> +
> +		gpll0_board_clk: gpll0-board-clk {
> +			compatible = "fixed-clock";
> +			#clock-cells = <0>;
> +		};
> +
> +		bi_tcxo_div2: bi-tcxo-div2-clk {
> +			compatible = "fixed-factor-clock";
> +			clocks = <&xo_board_clk>;
> +			clock-mult = <1>;
> +			clock-div = <2>;
> +			#clock-cells = <0>;
> +		};
> +	};
> +
> +	cpus {
> +		#address-cells = <2>;
> +		#size-cells = <0>;
> +
> +		CPU0: cpu@0 {

Lowercase label.

...

Best regards,
Krzysztof


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