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Message-ID: <CAP6Zq1hxwb3eWakPJecWXbt6_JqOmph-72bRn6pztxy1KiuF+Q@mail.gmail.com>
Date: Thu, 29 Aug 2024 11:07:14 +0300
From: Tomer Maimon <tmaimon77@...il.com>
To: Stephen Boyd <sboyd@...nel.org>
Cc: benjaminfair@...gle.com, joel@....id.au, krzysztof.kozlowski+dt@...aro.org, 
	mturquette@...libre.com, p.zabel@...gutronix.de, robh+dt@...nel.org, 
	tali.perry1@...il.com, venture@...gle.com, yuenn@...gle.com, 
	openbmc@...ts.ozlabs.org, linux-clk@...r.kernel.org, 
	linux-kernel@...r.kernel.org, devicetree@...r.kernel.org
Subject: Re: [PATCH RESEND v27 0/3] Introduce Nuvoton Arbel NPCM8XX BMC SoC

Hi Stephen,

Sure.

Thanks a lot,

Tomer

On Wed, 28 Aug 2024 at 23:54, Stephen Boyd <sboyd@...nel.org> wrote:
>
> Quoting Tomer Maimon (2024-08-15 08:02:52)
> > This patchset adds clock support for the Nuvoton
> > Arbel NPCM8XX Board Management controller (BMC) SoC family.
> >
> > The NPCM8xx clock controller is created using the auxiliary device framework
> > and set up in the npcm reset driver since the NPCM8xx clock is using the
> > same register region.
> >
> > This patchset cover letter is based from the initial support for NPCM8xx BMC to
> > keep tracking the version history.
> >
> > This patchset was tested on the Arbel NPCM8XX evaluation board.
> >
> > No changes since version 26, only tested in kernel 6.11.rc1
>
> Thanks for working on this! I'm waiting for Philipp to review/ack the
> reset driver part. Until then I don't think I can apply this series to
> the clk tree. I'll add a review tag to the clk driver patch in case that
> helps.

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