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Message-ID: <20240829082830.56959-2-quic_varada@quicinc.com>
Date: Thu, 29 Aug 2024 13:58:23 +0530
From: Varadarajan Narayanan <quic_varada@...cinc.com>
To: <andersson@...nel.org>, <mturquette@...libre.com>, <sboyd@...nel.org>,
        <robh@...nel.org>, <krzk+dt@...nel.org>, <conor+dt@...nel.org>,
        <konradybcio@...nel.org>, <catalin.marinas@....com>, <will@...nel.org>,
        <djakov@...nel.org>, <richardcochran@...il.com>,
        <geert+renesas@...der.be>, <dmitry.baryshkov@...aro.org>,
        <neil.armstrong@...aro.org>, <arnd@...db.de>,
        <nfraprado@...labora.com>, <linux-arm-msm@...r.kernel.org>,
        <linux-clk@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <linux-arm-kernel@...ts.infradead.org>,
        <linux-pm@...r.kernel.org>, <netdev@...r.kernel.org>
CC: Kathiravan Thirumoorthy <quic_kathirav@...cinc.com>,
        Krzysztof Kozlowski
	<krzysztof.kozlowski@...aro.org>,
        Varadarajan Narayanan
	<quic_varada@...cinc.com>
Subject: [PATCH v5 1/8] dt-bindings: clock: ipq5332: add definition for GPLL0_OUT_AUX clock

From: Kathiravan Thirumoorthy <quic_kathirav@...cinc.com>

Add the definition for GPLL0_OUT_AUX clock. This acts as the parent
for the certain networking subsystem (NSS) clocks.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Signed-off-by: Kathiravan Thirumoorthy <quic_kathirav@...cinc.com>
Signed-off-by: Varadarajan Narayanan <quic_varada@...cinc.com>
---
v5: Update commit message to include why this clock is needed
---
 include/dt-bindings/clock/qcom,ipq5332-gcc.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/dt-bindings/clock/qcom,ipq5332-gcc.h b/include/dt-bindings/clock/qcom,ipq5332-gcc.h
index 8a405a0a96d0..24486eb47ed8 100644
--- a/include/dt-bindings/clock/qcom,ipq5332-gcc.h
+++ b/include/dt-bindings/clock/qcom,ipq5332-gcc.h
@@ -179,6 +179,7 @@
 #define GCC_PCIE3X1_0_PIPE_CLK_SRC			170
 #define GCC_PCIE3X1_1_PIPE_CLK_SRC			171
 #define GCC_USB0_PIPE_CLK_SRC				172
+#define GPLL0_OUT_AUX					173
 
 #define GCC_ADSS_BCR					0
 #define GCC_ADSS_PWM_CLK_ARES				1
-- 
2.34.1


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