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Message-ID: <CAMuHMdVX217UjEPaZSMJUPUjGXXLz8orz=c2mTmLL-Vko4XmAA@mail.gmail.com>
Date: Thu, 29 Aug 2024 12:26:56 +0200
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Prabhakar <prabhakar.csengg@...il.com>
Cc: Magnus Damm <magnus.damm@...il.com>, Rob Herring <robh@...nel.org>, 
	Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	linux-renesas-soc@...r.kernel.org, devicetree@...r.kernel.org, 
	linux-kernel@...r.kernel.org, Biju Das <biju.das.jz@...renesas.com>, 
	Fabrizio Castro <fabrizio.castro.jz@...esas.com>, 
	Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: Re: [PATCH v4 7/9] arm64: dts: renesas: r9a09g057: Add WDT0-WDT3 nodes

On Wed, Aug 28, 2024 at 2:41 PM Prabhakar <prabhakar.csengg@...il.com> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
>
> Add WDT0-WDT3 nodes to RZ/V2H(P) ("R9A09G057") SoC DTSI.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> ---
> v3->v4
> - Used hexadecimal values for clocks and resets
> - Sorted nodes based on nodes index

Thanks, will queue in renesas-devel for v6.12.

> --- a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> @@ -201,6 +201,50 @@ ostm7: timer@...03000 {
>                         status = "disabled";
>                 };
>
> +               wdt0: watchdog@...00400 {
> +                       compatible = "renesas,r9a09g057-wdt";
> +                       reg = <0 0x11c00400 0 0x400>;
> +                       clocks = <&cpg CPG_MOD 0x4b>,
> +                                <&cpg CPG_MOD 0x4c>;

This fits on a single line, so I will reformat while applying.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

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