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Message-ID: <CAA8EJppFCVQPFa1-o7T08Bs+vzbykDXwVTOq4=B2LuWJb2gYGw@mail.gmail.com>
Date: Thu, 29 Aug 2024 14:16:55 +0300
From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To: Jun Nie <jun.nie@...aro.org>
Cc: Rob Clark <robdclark@...il.com>, Abhinav Kumar <quic_abhinavk@...cinc.com>, 
	Sean Paul <sean@...rly.run>, Marijn Suijten <marijn.suijten@...ainline.org>, 
	David Airlie <airlied@...il.com>, Daniel Vetter <daniel@...ll.ch>, 
	Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>, Maxime Ripard <mripard@...nel.org>, 
	Thomas Zimmermann <tzimmermann@...e.de>, linux-arm-msm@...r.kernel.org, 
	dri-devel@...ts.freedesktop.org, freedreno@...ts.freedesktop.org, 
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH 10/21] drm/msm/dpu: fix lm number counter for quad-pipe

On Thu, 29 Aug 2024 at 13:20, Jun Nie <jun.nie@...aro.org> wrote:
>
> Add the case to reserve multiple pair mixer for high resolution

I think you already know what is missing here.

>
> Signed-off-by: Jun Nie <jun.nie@...aro.org>
> ---
>  drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 6 +++---
>  drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c      | 8 +++++++-
>  2 files changed, 10 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> index 33cfd94badaba..f57725ad494d2 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> @@ -54,7 +54,7 @@
>  #define MAX_PHYS_ENCODERS_PER_VIRTUAL \
>         (MAX_H_TILES_PER_DISPLAY * NUM_PHYS_ENCODER_TYPES)
>
> -#define MAX_CHANNELS_PER_ENC 2
> +#define MAX_CHANNELS_PER_ENC 4
>
>  #define IDLE_SHORT_TIMEOUT     1
>
> @@ -2029,8 +2029,8 @@ static void dpu_encoder_helper_reset_mixers(struct dpu_encoder_phys *phys_enc)
>         struct dpu_hw_mixer_cfg mixer;
>         int i, num_lm;
>         struct dpu_global_state *global_state;
> -       struct dpu_hw_blk *hw_lm[2];
> -       struct dpu_hw_mixer *hw_mixer[2];
> +       struct dpu_hw_blk *hw_lm[MAX_CHANNELS_PER_ENC];
> +       struct dpu_hw_mixer *hw_mixer[MAX_CHANNELS_PER_ENC];
>         struct dpu_hw_ctl *ctl = phys_enc->hw_ctl;
>
>         memset(&mixer, 0, sizeof(mixer));
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
> index e219d706610c2..77d7ff789346e 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
> @@ -306,7 +306,11 @@ static int _dpu_rm_reserve_lms(struct dpu_rm *rm,
>                 if (!rm->mixer_blks[i])
>                         continue;
>
> -               lm_count = 0;
> +               /*
> +                * Clear the last bit to drop the previous primary mixer if
> +                * fail to find its peer.
> +                */
> +               lm_count &= 0xfe;
>                 lm_idx[lm_count] = i;
>
>                 if (!_dpu_rm_check_lm_and_get_connected_blks(rm, global_state,
> @@ -353,6 +357,8 @@ static int _dpu_rm_reserve_lms(struct dpu_rm *rm,
>
>                 trace_dpu_rm_reserve_lms(lm_idx[i] + LM_0, enc_id,
>                                          pp_idx[i] + PINGPONG_0);
> +               DPU_DEBUG("reserve lm[%d]:%d, pp_idx[%d]:%d, dspp[%d]:%d for enc_id %d\n",
> +                         i, lm_idx[i], i, pp_idx[i], i, dspp_idx[i], enc_id);
>         }
>
>         return 0;
>
> --
> 2.34.1
>


-- 
With best wishes
Dmitry

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