lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <150898c0-c3b6-41d2-9ce1-dda6607c1648@amd.com>
Date: Fri, 30 Aug 2024 16:08:08 +0200
From: Michal Simek <michal.simek@....com>
To: Bjorn Helgaas <helgaas@...nel.org>,
 Sean Anderson <sean.anderson@...ux.dev>
Cc: Lorenzo Pieralisi <lpieralisi@...nel.org>,
 Krzysztof WilczyƄski <kw@...ux.com>,
 Rob Herring <robh@...nel.org>, linux-pci@...r.kernel.org,
 Thippeswamy Havalige <thippeswamy.havalige@....com>,
 linux-arm-kernel@...ts.infradead.org, Markus Elfring
 <Markus.Elfring@....de>, Dan Carpenter <dan.carpenter@...aro.org>,
 linux-kernel@...r.kernel.org, Bjorn Helgaas <bhelgaas@...gle.com>,
 Bharat Kumar Gogada <bharat.kumar.gogada@...inx.com>,
 Bharat Kumar Gogada <bharatku@...inx.com>, Conor Dooley
 <conor+dt@...nel.org>,
 Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
 Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
 Michal Simek <michal.simek@...inx.com>, devicetree@...r.kernel.org
Subject: Re: [PATCH v4 0/7] PCI: xilinx-nwl: Add phy support

Hi Bjorn,

On 8/9/24 21:54, Bjorn Helgaas wrote:
> On Fri, May 31, 2024 at 12:13:30PM -0400, Sean Anderson wrote:
>> Add phy subsystem support for the xilinx-nwl PCIe controller. This
>> series also includes several small fixes and improvements.
>>
>> Changes in v4:
>> - Clarify dt-bindings commit subject/message
>> - Explain likely effects of the off-by-one error
>> - Trim down UBSAN backtrace
>> - Move if to after pci_host_probe
>> - Remove if in err_phy
>> - Fix error path in phy_enable skipping the first phy
>> - Disable phys in reverse order
>> - Use dev_err instead of WARN for errors
>>
>> Changes in v3:
>> - Document phys property
>> - Expand off-by-one commit message
>>
>> Changes in v2:
>> - Remove phy-names
>> - Add an example
>> - Get phys by index and not by name
>>
>> Sean Anderson (7):
>>    dt-bindings: pci: xilinx-nwl: Add phys property
>>    PCI: xilinx-nwl: Fix off-by-one in IRQ handler
>>    PCI: xilinx-nwl: Fix register misspelling
>>    PCI: xilinx-nwl: Rate-limit misc interrupt messages
>>    PCI: xilinx-nwl: Clean up clock on probe failure/removal
>>    PCI: xilinx-nwl: Add phy support
> 
> Applied the above to pci/controller/xilinx for v6.12, thanks!
> 
> I assume the DTS update below should go via some other tree, but let
> me know if I should pick it up.

Would be good if you can pick it up with the series together.
I have already acked that patch before.

Thanks,
Michal


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ